LT1374 4.5A, 500kHz Step-Down Switching Regulator U FEATURES DESCRIPTIO ■ The LT ®1374 is a 500kHz monolithic buck mode switching regulator. A 4.5A switch is included on the die along with all the necessary oscillator, control and logic circuitry. High switching frequency allows a considerable reduction in the size of external components. The topology is current mode for fast transient response and good loop stability. Both fixed output voltage and adjustable parts are available.
LT1374 W W W AXI U U ABSOLUTE RATI GS (Note 1) Input Voltage LT1374 ............................................................... 25V LT1374HV .......................................................... 32V BOOST Pin Voltage ................................................. 38V BOOST Pin Above Input Voltage ............................. 15V SHDN Pin Voltage ..................................................... 7V BIAS Pin Voltage ......................................................
LT1374 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 15V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
LT1374 ELECTRICAL CHARACTERISTICS Note 5: Boost current is the current flowing into the boost pin with the pin held 5V above input voltage. It flows only during switch on time. Note 6: VIN supply current is the current drawn when the BIAS pin is held at 5V and switching is disabled. If the BIAS pin is unavailable or open circuit, the sum of VIN and BIAS supply currents will be drawn by the VIN pin. Note 7: Switch on resistance is calculated by dividing VIN to VSW voltage by the forced current (4.5A).
LT1374 U W TYPICAL PERFOR A CE CHARACTERISTICS Shutdown Supply Current Error Amplifier Transconductance VIN = 25V 50 VIN = 10V 40 30 20 3000 2000 2500 200 PHASE GAIN (µMho) TRANSCONDUCTANCE (µMho) 60 Error Amplifier Transconductance 2500 1500 1000 500 150 GAIN 2000 100 VC COUT 12pF ROUT 200k 1500 VFB 2 × 10–3 1000 ERROR AMPLIFIER EQUIVALENT CIRCUIT ( ) 50 PHASE (DEG) INPUT SUPPLY CURRENT (µA) 70 0 10 RLOAD = 50Ω 0 50 25 0 75 100 –50 –25 JUNCTION TEMPERATURE (°C) 0 0.1 0.2 0.
LT1374 U W TYPICAL PERFOR A CE CHARACTERISTICS VC Pin Shutdown Threshold BOOST Pin Current DUTY CYCLE = 100% THRESHOLD VOLTAGE (V) 70 60 50 40 30 20 1.2 1.0 0.8 Kool Mµ 0 1 3 2 4 SWITCH CURRENT (A) 5 0.4 0.01 0.2 CORE LOSS IS INDEPENDENT OF LOAD CURRENT UNTIL LOAD CURRENT FALLS LOW ENOUGH FOR CIRCUIT TO GO INTO DISCONTINUOUS MODE 0.6 0.4 –50 2 1.2 0.8 ® PERMALLOY µ = 125 10 0 4 TYPE 52 POWDERED IRON 0.1 0.12 0.08 0.04 0.
LT1374 U U U PI FU CTIO S SYNC: (Excludes T7 package) The sync pin is used to synchronize the internal oscillator to an external signal. It is directly logic compatible and can be driven with any signal between 10% and 90% duty cycle. The synchronizing range is equal to initial operating frequency, up to 1MHz. This pin replaces SHDN on -SYNC option parts. See Synchronizing section in Applications Information for details.
LT1374 W BLOCK DIAGRA 0.01Ω INPUT + BIAS* 2.9V BIAS REGULATOR – CURRENT SENSE AMPLIFIER VOLTAGE GAIN = 20 INTERNAL VCC Σ SLOPE COMP BOOST 0.9V 500kHz OSCILLATOR SYNC S CURRENT COMPARATOR + SHUTDOWN COMPARATOR DRIVER CIRCUITRY RS FLIP-FLOP R – Q1 POWER SWITCH VSW – + 0.4V FREQUENCY SHIFT CIRCUIT SHDN 3.5µA FOLDBACK CURRENT LIMIT CLAMP + Q2 – LOCKOUT COMPARATOR ERROR AMPLIFIER gm = 2000µMho VC 2.38V FB + – 2.
LT1374 U U W U APPLICATIONS INFORMATION More Than Just Voltage Feedback foldback operation. Again, it is nearly transparent to the user under normal load conditions. The only loads that may be affected are current source loads which maintain full load current with output voltage less than 50% of final value. In these rare situations the feedback pin can be clamped above 1.5V with an external diode to defeat foldback current limit.
LT1374 U W U U APPLICATIONS INFORMATION MAXIMUM OUTPUT LOAD CURRENT Maximum load current for a buck converter is limited by the maximum switch current rating (IP) of the LT1374. This current rating is 4.5A up to 50% duty cycle (DC), decreasing to 3.7A at 80% duty cycle. This is shown graphically in Typical Performance Characteristics and as shown in the formula below: IP = 4.5A for DC ≤ 50% IP = 3.21 + 5.95(DC) – 6.
LT1374 U W U U APPLICATIONS INFORMATION When choosing an inductor you might have to consider maximum load current, core and copper losses, allowable component height, output voltage ripple, EMI, fault current in the inductor, saturation, and of course, cost. The following procedure is suggested as a way of handling these somewhat complicated and conflicting requirements. 1. Choose a value in microhenries from the graphs of maximum load current and core loss.
LT1374 U W U U APPLICATIONS INFORMATION saturation), average current (to limit heating), and fault current (if the inductor gets too hot, wire insulation will melt and cause turn-to-turn shorts). Keep in mind that all good things like high efficiency, low profile, and high temperature operation will increase cost, sometimes dramatically. Get a quote on the cheapest unit first to calibrate yourself on price, then ask for what you really want. 5.
LT1374 U W U U APPLICATIONS INFORMATION CATCH DIODE For high frequency switchers, the sum of ripple current slew rates may also be relevant and can be calculated from: Peak-to-peak output ripple voltage is the sum of a triwave created by peak-to-peak ripple current times ESR, and a square wave created by parasitic inductance (ESL) and ripple current slew rate. Capacitive reactance is assumed to be small compared to ESR or ESL. Example: with VIN =10V, VOUT = 5V, L = 10µH, ESR = 0.
LT1374 U W U U APPLICATIONS INFORMATION that it can be recharged fully under the worst-case condition of minimum input voltage. Almost any type of film or ceramic capacitor will work fine. WARNING! Peak voltage on the BOOST pin is the sum of unregulated input voltage plus the voltage across the boost capacitor.
LT1374 U W U U APPLICATIONS INFORMATION Threshold voltage for lockout is about 2.38V, slightly less than the internal 2.42V reference voltage. A 3.5µA bias current flows out of the pin at threshold. This internally generated current is used to force a default high state on the shutdown pin if the pin is left open. When low shutdown current is not an issue, the error due to this current can be minimized by making RLO 10k or less.
LT1374 U W U U APPLICATIONS INFORMATION CONNECT TO GROUND PLANE MINIMIZE LT1374, C3, D1 LOOP VIN C3 D1 C5 GND C6 VOUT 1 GND C1 CONNECT TO GROUND PLANE R3 TAKE OUTPUT DIRECTLY FROM END OF OUTPUT CAPACITOR L1 U1 D2 PLACE FEEDTHROUGHS AROUND GND PIN FOR GOOD THERMAL CONDUCTIVITY KEEP FB AND VC COMPONENTS AWAY FROM HIGH FREQUENCY, HIGH CURRENT COMPONENTS R2 C4 KELVIN SENSE VOUT 13745 F05a Figure 5a.
LT1374 U W U U APPLICATIONS INFORMATION SOLDER EXPOSED PAD AND USE FEEDTHROUGHS FOR BETTER THERMAL CONDUCTIVITY KEEP FB AND VC COMPONENTS AWAY FROM HIGH FREQUENCY, HIGH CURRENT COMPONENTS GND VIN C4 C2 R3 KELVIN SENSE OUTPUT C3 D2 R2 R1 C1 VOUT D1 C1 1374 F05b Figure 5b.
LT1374 U U W U APPLICATIONS INFORMATION MINIMIZE LT1374 C3, D1 LOOP CONNECT TO GND PLANE C3 D1 VOUT VIN TAKE OUTPUT DIRECTLY FROM END OF OUTPUT CAPACITOR L1 PLACE FEEDTHROUGHS AROUND GND TAB, C3, D1 FOR GOOD THERMAL CONDUCTIVITY KELVIN SENSE VOUT VOUT D2 C4 C5 C6 CC2 R2 R3 CC 7 6 5 4 3 2 1 U1 RC TAB IS GND GND 1374 F05c KEEP FB AND VC COMPONENTS AWAY FROM ANY HIGH FREQUENCY, HIGH CURRENT CMPONENTS OR PATHS Figure 5c.
LT1374 U W U U APPLICATIONS INFORMATION PARASITIC RESONANCE Resonance or “ringing” may sometimes be seen on the switch node (see Figure 7). Very high frequency ringing following switch rise time is caused by switch/diode/input capacitor lead inductance and diode capacitance. Schottky diodes have very high “Q” junction capacitance that can ring for many cycles when excited at high frequency.
LT1374 U W U U APPLICATIONS INFORMATION The term inside the radical has a maximum value of 0.5 when input voltage is twice output, and stays near 0.5 for a relatively wide range of input voltages. It is common practice therefore to simply use the worst-case value and assume that RMS ripple current is one half of load current. At maximum output current of 4.5A for the LT1374, the input bypass capacitor should be rated at 2.25A ripple current.
LT1374 U W U U APPLICATIONS INFORMATION THERMAL CALCULATIONS Power dissipation in the LT1374 chip comes from four sources: switch DC loss, switch AC loss, boost circuit current, and input quiescent current. The following formulas show how to calculate each of these losses. These formulas assume continuous mode operation, so they should not be used for calculating efficiency at light load currents.
LT1374 U U W U APPLICATIONS INFORMATION Error amplifier transconductance phase and gain are shown in Figure 11. The error amplifier can be modeled as a transconductance of 2000µMho, with an output impedance of 200kΩ in parallel with 12pF. In all practical applications, the compensation network from VC pin to ground has a much lower impedance than the output impedance of the amplifier at frequencies above 500Hz.
LT1374 U W U U APPLICATIONS INFORMATION What About a Resistor in the Compensation Network? It is common practice in switching regulator design to add a “zero” to the error amplifier compensation to increase loop phase margin. This zero is created in the external network in the form of a resistor (RC) in series with the compensation capacitor. Increasing the size of this resistor generally creates better and better loop stability, but there are two limitations on its value.
LT1374 U W U U APPLICATIONS INFORMATION current and ripple current variations), output capacitance (±20% to ±50% due to production tolerance, temperature, aging and changes at the load), output capacitor ESR (±200% due to production tolerance, temperature and aging), and finally, DC input voltage and output load current . This makes it important for the designer to check out the final design to ensure that it is “robust” and tolerant of all these variations.
LT1374 U W U U APPLICATIONS INFORMATION likely to be changed in production is the output capacitor, because that is the component most likely to have manufacturer variations (in ESR) large enough to cause problems. It would be a wise move to lock down the sources of the output capacitor in production. A possible exception to the “clean response” rule is at very light loads, as evidenced in Figure 14 with ILOAD = 50mA.
LT1374 U W U U APPLICATIONS INFORMATION With the conditions above: This duty cycle is close enough to 50% that IP can be assumed to be 4.5A. OUTPUT DIVIDER If the adjustable part is used, the resistor connected to VOUT (R2) should be set to approximately 5k. R1 is calculated from: INDUCTOR VALUE lowest value of inductance that can be used, but in some cases (lower output load currents) it may give a value that creates unnecessarily high output ripple voltage.
LT1374 U W U U APPLICATIONS INFORMATION This says that discontinuous mode can be used and the minimum inductor needed is found from: In practice, the inductor should be increased by about 30% over the calculated minimum to handle losses and variations in value. This suggests a minimum inductor of 1.3µH for this application, but looking at the ripple voltage chart shows that output ripple voltage could be reduced by a factor of two by using a 15µH inductor.
LT1374 U W U U APPLICATIONS INFORMATION FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663, Exposed Pad Variation BB) 4.90 – 5.10* (.193 – .201) 3.58 (.141) 3.58 (.141) 16 1514 13 12 1110 6.60 ±0.10 9 2.94 (.116) 4.50 ±0.10 2.94 6.40 (.116) (.252) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1.
LT1374 U PACKAGE DESCRIPTION R Package 7-Lead Plastic DD Pak (LTC DWG # 05-08-1462) .256 (6.502) .060 (1.524) TYP .060 (1.524) .390 – .415 (9.906 – 10.541) .165 – .180 (4.191 – 4.572) .045 – .055 (1.143 – 1.397) 15° TYP .060 (1.524) .183 (4.648) +.008 .004 –.004 +0.203 0.102 –0.102 .059 (1.499) TYP .330 – .370 (8.382 – 9.398) ( ) .095 – .115 (2.413 – 2.921) .075 (1.905) .300 (7.620) +.012 .143 –.020 +0.305 3.632 –0.
LT1374 U PACKAGE DESCRIPTION S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 .245 MIN 7 6 5 .160 ±.005 .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) .030 ±.005 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 0°– 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.
LT1374 U PACKAGE DESCRIPTION T7 Package 7-Lead Plastic TO-220 (Standard) (LTC DWG # 05-08-1422) .390 – .415 (9.906 – 10.541) .165 – .180 (4.191 – 4.572) .147 – .155 (3.734 – 3.937) DIA .045 – .055 (1.143 – 1.397) .230 – .270 (5.842 – 6.858) .460 – .500 (11.684 – 12.700) .570 – .620 (14.478 – 15.748) .330 – .370 (8.382 – 9.398) .620 (15.75) TYP .700 – .728 (17.780 – 18.491) .095 – .115 (2.413 – 2.921) .155 – .195* (3.937 – 4.953) SEATING PLANE .152 – .202 .260 – .320 (3.860 – 5.130) (6.604 – 8.
LT1374 U TYPICAL APPLICATION Dual Output SEPIC Converter losses. C4 provides a low impedance path to maintain an equal voltage swing in L1B, improving regulation. In a flyback converter, during switch on time, all the converter’s energy is stored in L1A only, since no current flows in L1B. At switch off, energy is transferred by magnetic coupling into L1B, powering the – 5V rail. C4 pulls L1B positive during switch on time, causing current to flow, and energy to build in L1B and C4.
