Datasheet

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LT1720/LT1721

17201fc

TYPICAL APPLICATION

DESCRIPTION

Dual/Quad, 4.5ns, Single

Supply 3V/5V Comparators

with Rail-to-Rail Outputs

The LT

1720/LT1721 are UltraFast

dual/quad compara-

tors optimized for single supply operation, with a supply

voltage range of 2.7V to 6V. The input voltage range extends

from 100mV below ground to 1.2V below the supply volt-

age. Internal hysteresis makes the LT1720/LT1721 easy to

use even with slow moving input signals. The rail-to-rail

outputs directly interface to TTL and CMOS. Alternatively,

the symmetric output drive can be harnessed for analog

applications or for easy translation to other single supply

logic levels.

The LT1720 is available in three 8-pin packages; three pins

per comparator plus power and ground. In addition to SO

and MSOP packages, a 3mm × 3mm low proﬁ le (0.8mm)

dual ﬁ ne pitch leadless package (DFN) is available for space

limited applications. The LT1721 is available in the 16-pin

SSOP and S packages.

The pinouts of the LT1720/LT1721 minimize parasitic

effects by placing the most sensitive inputs (inverting)

away from the outputs, shielded by the power rails. The

LT1720/LT1721 are ideal for systems where small size and

low power are paramount.

2.7V to 6V Crystal Oscillator with TTL/CMOS Output

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. UltaFast is

a trademark of Linear Technology Corporation. All other trademarks are the property of their

respective owners.

FEATURES

APPLICATIONS

High Speed Differential Line Receiver

Crystal Oscillator Circuits

Window Comparators

Threshold Detectors/Discriminators

Pulse Stretchers

Zero-Crossing Detectors

High Speed Sampling Circuits

UltraFast: 4.5ns at 20mV Overdrive

7ns at 5mV Overdrive

Low Power: 4mA per Comparator

Optimized for 3V and 5V Operation

Pinout Optimized for High Speed Ease of Use

Input Voltage Range Extends 100mV

Below Negative Rail

TTL/CMOS Compatible Rail-to-Rail Outputs

Internal Hysteresis with Speciﬁ ed Limits

Low Dynamic Current Drain; 15μA/(V-MHz),

Dominated by Load In Most Circuits

Tiny 3mm × 3mm × 0.75mm DFN Package (LT1720)

Propagation Delay vs Overdrive

–

1/2 LT1720

2.7V TO 6V

620Ω

220Ω

1MHz TO 10MHz

CRYSTAL (AT-CUT)

17201 TA01

0.1μF 1.8k

OUTPUT

GROUND

CASE

OVERDRIVE (mV)

DELAY (ns)

17201 TA02

10 20 40

25°C

STEP

= 100mV

= 5V

LOAD

= 10pF

RISING EDGE

PDLH

)

FALLING EDGE

PDHL

)

Summary of content (28 pages)

PAGE 1
LT1720/LT1721 Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs DESCRIPTION FEATURES n n n n n n n n n UltraFast: 4.
PAGE 2
LT1720/LT1721 ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltage, VCC to GND ........................................7V Input Current....................................................... ±10mA Output Current (Continuous) ............................. ±20mA Junction Temperature .......................................... 150°C (DD Package) .................................................... 125°C Lead Temperature (Soldering, 10 sec) .................. 300°C Storage Temperature Range...................
PAGE 3
LT1720/LT1721 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT1720CDD#PBF LT1720CDD#TRPBF LAAV 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LT1720IDD#PBF LT1720IDD#TRPBF LAAV 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LT1720CMS8#PBF LT1720CMS8#TRPBF LTDS 8-Lead Plastic MSOP 0°C to 70°C LT1720IMS8#PBF LT1720IMS8#TRPBF LTACW 8-Lead Plastic MSOP –40°C to 85°C LT1720CS8#PBF LT1720CS8#TRPBF 1720 8-Lead Plastic SO 0°C to 70°C LT1
PAGE 4
LT1720/LT1721 ELECTRICAL CHARACTERISTICS The l denotes speciﬁcations that apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = 5V, VCM = 1V, COUT = 10pF, VOVERDRIVE = 20mV, unless otherwise speciﬁed. SYMBOL PARAMETER CONDITIONS ΔtPD Differential Propagation Delay (Note 9) Between Channels 0.3 1.0 ns tSKEW Propagation Delay Skew (Note 10) Between tPDLH/tPDHL 0.5 1.5 ns tr Output Rise Time 10% to 90% 2.5 ns tf Output Fall Time 90% to 10% 2.
PAGE 5
LT1720/LT1721 2 25°C VCC = 5V –2 –3 –4 –5 –6 –7 –5 –4 –3 –2 –1 0 1 2 3 4 DIFFERENTIAL INPUT VOLTAGE (V) 5 6.0 5.5 5.0 4.5 VCC = 5V 4.0 VCC = 3V 3.5 3.0 2.5 2.0 –50 –25 75 50 25 TEMPERATURE (˚C) 0 100 Propagation Delay vs Load Capacitance 7 RISING EDGE (tPDLH) DELAY (ns) 6 FALLING EDGE (tPDHL) 5 4 3 2 VCC = 3V 7.0 VCC = 5V 6.5 OVERDRIVE = 5mV 6.0 5.5 1 4 3 2 5 SUPPLY VOLTAGE (V) 1 5.0 25°C VSTEP = 100mV OVERDRIVE = 20mV CLOAD = 10pF RISING EDGE (tPDLH) 4.
PAGE 6
LT1720/LT1721 PIN FUNCTIONS LT1720 LT1721 +IN A (Pin 1): Noninverting Input of Comparator A. –IN A (Pin 1): Inverting Input of Comparator A. –IN A (Pin 2): Inverting Input of Comparator A. +IN A (Pin 2): Noninverting Input of Comparator A. –IN B (Pin 3): Inverting Input of Comparator B. GND (Pins 3, 6): Ground. +IN B (Pin 4): Noninverting Input of Comparator B. OUT A (Pin 4): Output of Comparator A. GND (Pin 5): Ground. OUT B (Pin 5): Output of Comparator B.
PAGE 7
LT1720/LT1721 TEST CIRCUITS ±VTRIP Test Circuit 15VP-P BANDWIDTH-LIMITED TRIANGLE WAVE ~1kHz LTC203 14 VCC 15 3 2 0.1μF 1000 s VTRIP+ 50k 1μF 10nF + 16 1 9 8 10k 50Ω 50Ω VCM – 200k 1/2 LT1112 – DUT 1/2 LT1720 OR 1/4 LT1721 11 10 6 + 1000 s VHYST 7 1000 s VOS 10k LTC203 3 1/2 LT1638 + 100k 15 1000 s VTRIP– 1μF 10nF + 1 16 8 9 2.4k – 100k 14 100k – 100k 2 1/2 LT1638 1/2 LT1112 – 0.
PAGE 8
LT1720/LT1721 APPLICATIONS INFORMATION Input Voltage Considerations Input Protection The LT1720/LT1721 are speciﬁed for a common mode range of –100mV to 3.8V when used with a single 5V supply. In general the common mode range is 100mV below ground to 1.2V below VCC. The criterion for this common mode limit is that the output still responds correctly to a small differential input signal.
PAGE 9
LT1720/LT1721 APPLICATIONS INFORMATION High Speed Design Considerations Application of high speed comparators is often plagued by oscillations. The LT1720/LT1721 have 4mV of internal hysteresis, which will prevent oscillations as long as parasitic output to input feedback is kept below 4mV. However, with the 2V/ns slew rate of the LT1720/LT1721 outputs, a 4mV step can be created at a 100Ω input source with only 0.02pF of output to input coupling.
PAGE 10
LT1720/LT1721 APPLICATIONS INFORMATION The exact amount of hysteresis will vary from part to part as indicated in the speciﬁcations table. The hysteresis level will also vary slightly with changes in supply voltage and common mode voltage. A key advantage of the LT1720/ LT1721 is the signiﬁcant reduction in these effects, which is important whenever an LT1720/LT1721 is used to detect a threshold crossing in one direction only.
PAGE 11
LT1720/LT1721 APPLICATIONS INFORMATION Interfacing the LT1720/LT1721 to ECL The LT1720/LT1721 comparators can be used in high speed applications where Emitter-Coupled Logic (ECL) is deployed. To interface the outputs of the LT1720/LT1721 to ECL logic inputs, standard TTL/CMOS to ECL level translators such as the 10H124, 10H424 and 100124 can be used. These components come at a cost of a few nanoseconds additional delay as well as supply currents of 50mA or more, and are only available in quads.
PAGE 12
LT1720/LT1721 APPLICATIONS INFORMATION 5V 5V 180Ω LSTTL DO NOT USE FOR LT1720/LT1721 LEVEL TRANSLATION. SEE TEXT 270Ω 10KH/E 820Ω (a) STANDARD TTL TO PECL TRANSLATOR VCC R2 R1 1/2 LT1720 10KH/E 100K/E R3 VCC R1 R2 R3 5V OR 5.2V 510Ω 180Ω 750Ω 4.5V 620Ω 180Ω 510Ω (b) LT1720/LT1721 OUTPUT TO PECL TRANSLATOR VCC 3V R1 R2 1/2 LT1720 R4 10KH/E 100K/E R3 R4 VCC R1 R2 R3 5V OR 5.2V 300Ω 180Ω OMIT 560Ω 4.
PAGE 13
LT1720/LT1721 APPLICATIONS INFORMATION Circuit Description The block diagram of one comparator in the LT1720/LT1721 is shown in Figure 6. There are differential inputs (+IN/–IN), an output (OUT), a single positive supply (VCC) and ground (GND). All comparators are completely independent, sharing only the power and ground pins. The circuit topology consists of a differential input stage, a gain stage with hysteresis and a complementary common-emitter output stage.
PAGE 14
LT1720/LT1721 APPLICATIONS INFORMATION Speed Limits The LT1720/LT1721 comparators are intended for high speed applications, where it is important to understand a few limitations. These limitations can roughly be divided into three categories: input speed limits, output speed limits, and internal speed limits. There are no signiﬁcant input speed limits except the shunt capacitance of the input nodes. If the 2pF typical input nodes are driven, the LT1720/LT1721 will respond.
PAGE 15
LT1720/LT1721 APPLICATIONS INFORMATION The gain and hysteresis stage of the LT1720/LT1721 is simple, short and high speed to help prevent parasitic oscillations while adding minimum dispersion. This internal “self-latch” can be usefully exploited in many applications because it occurs early in the signal chain, in a low power, fully differential stage.
PAGE 16
LT1720/LT1721 APPLICATIONS INFORMATION The optional A1 feedback network shown can be used to force identical output duty cycles. The steady state duty cycles of both outputs will be 44%. Note, though, that the addition of this network only adjusts the percentage of time each output is high to be the same, which can be important in switching circuits requiring identical settling times.
PAGE 17
LT1720/LT1721 APPLICATIONS INFORMATION Timing Skews For a number of reasons, the LT1720/LT1721’s superior timing speciﬁcations make them an excellent choice for applications requiring accurate differential timing skew. The comparators in a single package are inherently well matched, with just 300ps ΔtPD typical. Monolithic construction keeps the delays well matched vs supply voltage and temperature.
PAGE 18
LT1720/LT1721 APPLICATIONS INFORMATION DELAY DETECTOR 5V R5 1.82k* + Y U1A 1/4 LT1721 51Ω* 301Ω* OPTIONAL LOGARITHMIC PULSE STRETCHER (SEE TEXT) R6 301Ω* 5V – CAPTURE – R8* 4.53k 5V 0.1μF R9 487Ω* 301Ω* C1 5.6pF U1C 1/4 LT1721 + – U1B 1/4 LT1721 Z 1N5711 VIN 0.
PAGE 19
LT1720/LT1721 APPLICATIONS INFORMATION Optional Logarithmic Pulse Stretcher The fourth comparator of the quad LT1721 can be put to work as a logarithmic pulse stretcher. This simple circuit can help tremendously if you don’t have a fast enough oscilloscope (or control circuit) to easily capture 3ns pulse widths (or faster). When an input pulse occurs, C2 is charged up with a 180ns capture2 time constant.
PAGE 20
LT1720/LT1721 APPLICATIONS INFORMATION in the two output pulse widths is the per-octave response of your circuit (see Equation (3)). Shorter cable length differences can be used to get a plot of circuit performance down to 1.5ns (if any), which can then later be used as a lookup reference when you have moved from quantifying the circuit to using the circuit. (Note there is a slight aberration in performance below 10ns. See Figure 14.
PAGE 21
LT1720/LT1721 APPLICATIONS INFORMATION VCC VCC OUTPUTS + U1B 1/4 LT1721 1k VCC – VCC INPUT 909Ω + U1A 1/4 LT1721 – VREF 10ns 10ns 750Ω 1.37k 215Ω + 681Ω U1C 1/4 LT1721 100pF – 10ns 10ns 681Ω 4.22k + U1D 1/4 LT1721 – 453Ω 17201 F16 Figure 16. 10ns Triple Overlap Generator 5V 2.2k 2.2k INPUT p100mV FULL SCALE + 1k LT1227 – OUTPUT p1V FULL SCALE 909Ω = 1N5711 AC BALANCE = CA3039 DIODE ARRAY (SUBSTRATE TO –5V) 100Ω 3pF 5V 1.5k 3.6k 1.1k 0.1μF + CIN 1/2 LT1720 1.
PAGE 22
LT1720/LT1721 APPLICATIONS INFORMATION The input waveform is presented to the diode bridge switch, the output of which feeds the LT1227 wideband ampliﬁer. The LT1720 comparators, triggered by the sample command, generate phase-opposed outputs. These signals are level shifted by the transistors, providing complementary bipolar drive to switch the bridge. A skew compensation trim ensures bridge-drive signal simultaneity within 1ns. The AC balance corrects for parasitic capacitive bridge imbalances.
PAGE 23
LT1720/LT1721 APPLICATIONS INFORMATION Coincidence Detector High speed comparators are especially suited for interfacing pulse-output transducers, such as particle detectors, to logic circuitry. The matched delays of a monolithic dual are well suited for those cases where the coincidence of two pulses needs to be detected. The circuit of Figure 19 is a coincidence detector that uses an LT1720 and discrete components as a fast AND gate. The reference level is set to 1V, an arbitrary threshold.
PAGE 24
LT1720/LT1721 GND 150Ω +IN –IN VCC 150Ω 17201 SS OUTPUT SIMPLIFIED SCHEMATIC 17201fc 24
PAGE 25
LT1720/LT1721 PACKAGE DESCRIPTION DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 p 0.10 8 0.675 p 0.05 3.00 p 0.10 (4 SIDES) 3.5 p 0.05 1.65 p0.05 2.15 p 0.05 (2 SIDES) PACKAGE OUTLINE 1.65 p 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD) DFN 1203 4 0.25 p 0.05 0.75 p 0.05 0.200 REF 0.25 p 0.05 1 0.50 BSC 0.50 BSC 2.38 p0.05 (2 SIDES) 2.38 p 0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1.
PAGE 26
LT1720/LT1721 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 p 0.127 (.035 p .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.42 p 0.038 (.0165 p .0015) TYP 3.00 p 0.102 (.118 p .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) DETAIL “A” 0.254 (.010) 0o – 6o TYP GAUGE PLANE 1 0.53 p 0.152 (.021 p .006) 2 3 4 1.10 (.043) MAX DETAIL “A” 0.86 (.
PAGE 27
LT1720/LT1721 PACKAGE DESCRIPTION GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 p .005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 p.0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 p .004 s 45o (0.38 p 0.10) .007 – .0098 (0.178 – 0.249) .0532 – .0688 (1.35 – 1.75) 2 3 4 5 6 7 8 .004 – .0098 (0.102 – 0.249) 0o – 8o TYP .016 – .050 (0.
PAGE 28
LT1720/LT1721 TYPICAL APPLICATION Pulse Stretcher capacitor C now begins charging through R and, at the end of 100ns, C2 resets low. The output of C1 also goes low, latching both outputs low. A new pulse at the input of C1 can now restart the process. Timing capacitor C can be increased without limit for longer output pulses. For detecting short pulses from a single sensor, a pulse stretcher is often required.