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LT1970

1970fc

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

TYPICAL APPLICATION

DESCRIPTION

500mA Power Op Amp with

Adjustable Precision Current Limit

The LT

1970 is a ±500mA power op amp with precise

externally controlled current limiting. Separate control

voltages program the sourcing and sinking current limit

sense thresholds with 2% accuracy. Output current may

be boosted by adding external power transistors.

The circuit operates with single or split power supplies

from 5V to 36V total supply voltage. In normal operation,

the input stage supplies and the output stage supplies are

connected (V

to V

and V

to V

–

). To reduce power

dissipation it is possible to power the output stage (V

–

) from independent, lower voltage rails. The ampliﬁ er is

unity-gain stable with a 3.6MHz gain bandwidth product

and slews at 1.6V/µs. The current limit circuits operate

with a 2MHz response between the VC

SRC

or VC

SNK

control

inputs and the ampliﬁ er output.

Open collector status ﬂ ags signal current limit circuit

activation, as well as thermal shutdown of the ampliﬁ er.

An enable logic input puts the ampliﬁ er into a low power,

high impedance output state when pulled low. Thermal

shutdown and a ±800mA ﬁ xed current limit protect the

chip under fault conditions.

The LT1970 is packaged in a 20-lead TSSOP package with

a thermally conductive copper bottom plate to facilitate

heat sinking.

= 2 Ampliﬁ er with Adjustable ±500mA Full-Scale

Current Limit and Fault Indication

FEATURES

APPLICATIONS

±500mA Minimum Output Current

Independent Adjustment of Source and

Sink Current Limits

2% Current Limit Accuracy

Operates with Single or Split Supplies

Shutdown/Enable Control Input

Open Collector Status Flags:

Sink Current Limit

Source Current Limit

Thermal Shutdown

Fail Safe Current Limit and Thermal Shutdown

1.6V/µs Slew Rate

3.6MHz Gain Bandwidth Product

Fast Current Limit Response: 2MHz Bandwidth

Speciﬁ ed Temperature Range: –40°C to 85°C

Available in a 20-Lead TSSOP Package

Automatic Test Equipment

Laboratory Power Supplies

Motor Drivers

Thermoelectric Cooler Driver

Current Limited Sinewave Into 10 Load

COMMON

–

SRC

SNK

ISNK

ISRC

SENSE

–

SENSE

TSD

OUT

1

1/4W

+IN

15V

LT1970

–15V

15V

–IN

LOAD

10k

1970 TA01

LIMIT

0V TO 5V

LIMIT

10 • R

OUT(LIMIT)

= ±

20µs/DIV

1970 TA02

LOAD

–2V

SRC

= 4V

SNK

= 2V

= 1Ω

Summary of content (26 pages)

PAGE 1
LT1970 500mA Power Op Amp with Adjustable Precision Current Limit FEATURES DESCRIPTION n The LT®1970 is a ± 500mA power op amp with precise externally controlled current limiting. Separate control voltages program the sourcing and sinking current limit sense thresholds with 2% accuracy. Output current may be boosted by adding external power transistors.
PAGE 2
LT1970 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW Supply Voltage (VCC to VEE) ..................................... 36V Positive High Current Supply (V+)................... V – to VCC Negative High Current Supply(V –) ....................VEE to V+ Ampliﬁer Output (OUT) ..................................... V – to V+ Current Sense Pins (SENSE+, SENSE–, FILTER) ........................... V – to V+ Logic Outputs (ISRC, ISNK, TSD) ....... COMMON to VCC Input Voltage (–IN, +IN) ............
PAGE 3
LT1970 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. See Test Circuit for standard test conditions. SYMBOL PARAMETER CONDITIONS MIN RIN Input Resistance Common Mode Differential Mode CIN Input Capacitance Pin 8 and Pin 9 to Ground VCM Input Voltage Range Typical Guaranteed by CMRR Test l –14.5 –12.0 TYP MAX UNITS 500 100 kΩ kΩ 6 pF 13.6 12.
PAGE 4
LT1970 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. See Test Circuit for standard test conditions. SYMBOL PARAMETER CONDITIONS MIN TYP 750 1000 Current Sense Bandwidth RCSF MAX UNITS 2 Resistance FILTER to SENSE– l MHz 1250 Ω 1 μA 0.4 V Logic I/O Characteristics Logic Output Leakage ISRC, ISNK, TSD V = 15V l Logic Low Output Level I = 5mA (Note 6) l 0.
PAGE 5
LT1970 TYPICAL PERFORMANCE CHARACTERISTICS Open-Loop Gain and Phase vs Frequency Supply Current vs Supply Voltage IV+ IV– IVCC 3.0 2.5 IVEE 2.0 1.5 1.0 TA = 25°C VCC = V+ = –VEE = –V– 0.5 0 2 4 6 8 10 12 14 16 SUPPLY VOLTAGE (±V) 60 60 90 58 80 56 50 OPEN-LOOP GAIN (dB) 3.
PAGE 6
LT1970 TYPICAL PERFORMANCE CHARACTERISTICS Slew Rate vs Temperature 2.5 VS = ±15V Large-Signal Response, AV = 1 FALLING 2.0 10V 10V 1.5 5V/DIV RISING 5V/DIV SLEW RATE (V/μs) Large-Signal Response, AV = – 1 0V 0V –10V 1.0 –10V 0.
PAGE 7
LT1970 TYPICAL PERFORMANCE CHARACTERISTICS Low Level Current Sense Transfer Curve Logic Output Level vs Sink Current (Output Low) 1.0 + V = 15V 0.9 V– = –15V LOGIC OUTPUT VOLTAGE (V) 20 15 SOURCING CURRENT 5 0 –5 SINKING CURRENT –10 –15 1400 25 50 75 100 125 150 175 200 225 250 VCSNK = VCSRC (mV) 0.7 0.6 25°C 0.5 125°C 0.4 0.3 –55°C 0.2 1200 SOURCE 1000 800 SINK 600 400 200 0 0.001 0.01 0.
PAGE 8
LT1970 PIN FUNCTIONS VEE (Pins 1, 10, 11, 20, Package Base): Minus Supply Voltage. VEE connects to the substrate of the integrated circuit die, and therefore must always be the most negative voltage applied to the part. Decouple VEE to ground with a low ESR capacitor. VEE may be a negative voltage or it may equal ground potential. Any or all of the VEE pins may be used. Unused VEE pins must remain open. V– (Pin 2): Output Stage Negative Supply. V – may equal VEE or may be smaller in magnitude.
PAGE 9
LT1970 PIN FUNCTIONS VCSNK (Pin 12): Sink Current Limit Control Voltage Input. The current sink limit ampliﬁer will activate when the sense voltage between SENSE+ and SENSE– equals –1.0 • VVCSNK/10. VCSNK may be set between VCOMMON and VCOMMON + 6V. The transfer function between VCSNK and VSENSE is linear except for very small input voltages at VCSNK < 60mV. VSENSE limits at a minimum set point of 4mV typical to insure that the sink and source limit ampliﬁers do not try to operate simultaneously.
PAGE 10
LT1970 BLOCK DIAGRAM AND TEST CIRCUIT RFB 1k VCC 7 V+ 19 9 + – + VIN –IN 15V Q1 OUT 1= GM1 8 RG 1k +IN – 3 Q2 ISNK 10k 17 15V 18 15 5V 12 D1 ISINK TSD ENABLE VCSNK VCSNK D2 13 VCSRC + – + – ENABLE – 10k ISRC + 16 – 10k VCSRC VSNK SENSE+ FILTER VSRC SENSE– RFIL 1k ISRC 4 5 6 RLOAD 1k V– 2 + 14 RCS 1Ω VEE COMMON 1, 10, 11, 20 –15V 1970TC APPLICATIONS INFORMATION The LT1970 power op amp with precision controllable current limit is a ﬂexible voltage and current s
PAGE 11
LT1970 APPLICATIONS INFORMATION its very high transconductance, takes control from the input stage, GM1. The output current is regulated to a value of IOUT = VSENSE/RSENSE = (VCSRC or VCSNK)/(10 • RSENSE). The time required for the current limit ampliﬁers to take control of the output is typically 4μs. Linear operation of the current limit sense ampliﬁer occurs with the inputs SENSE+ and SENSE– ranging between VCC – 1.5V and VEE + 1.5V.
PAGE 12
LT1970 APPLICATIONS INFORMATION ENABLE Control The ENABLE input pin puts the LT1970 into a low supply current, high impedance output state. The ENABLE pin responds to TTL threshold levels with respect to the COMMON pin. Pulling the ENABLE pin low is the best way to force zero current at the output. Setting VCSNK = VCSRC = 0V allows the output current to remain as high as ± 4mV/RSENSE.
PAGE 13
LT1970 APPLICATIONS INFORMATION take protective measures when a current limit condition is detected automatically. initially sets a high value of current limit (500mA). The circuit operates normally until the signal is large enough to enter current limit. When either current limit ﬂag goes low, the current limit control voltage is reduced by a factor of 10. This then forces a low level of output current (50mA) until the signal is reduced in magnitude.
PAGE 14
LT1970 APPLICATIONS INFORMATION and V– to their minimum values for the required output swing will minimize power dissipation. The supplies VCC and VEE may also be reduced to a minimal value, but these supply pins do not carry high currents, and the power saving is much less. VCC and VEE must be greater than the maximum output swing by 1.5V or more. not very effective. Expanding the area on various layers signiﬁcantly reduces the overall thermal resistance.
PAGE 15
LT1970 APPLICATIONS INFORMATION STILL AIR θJA PACKAGE TOP LAYER 2ND LAYER 3RD LAYER BOTTOM LAYER TSSOP 100°C/W TSSOP 50°C/W TSSOP 45°C/W 1970 F05a Typical Reduction in θJA with Laminar Airﬂow Over the Device 0 % REDUCTION RELATIVE TO θJA IN STILL AIR REDUCTION IN θJA (%) –10 –20 –30 –40 –50 –60 0 100 200 300 400 500 600 700 800 900 1000 AIRFLOW (LINEAR FEET PER MINUTE, lfpm) 1970 F05b Figure 5. Examples of PCB Metal Used for Heat Dissipation. Driver Package Mounted on Top Layer.
PAGE 16
LT1970 APPLICATIONS INFORMATION Figure 6 shows the LT1970 driving an inductive load with a controlled amount of current. This load is shown as a generic magnetic transducer, which could be used to create and modulate a magnetic ﬁeld. Driving the current limit control inputs directly forces a current through the load that could range up to 2MHz in modulation. Biasing the input stage to the midpoint of the modulation signal allows symmetrical bidirectional current ﬂow through the load.
PAGE 17
LT1970 APPLICATIONS INFORMATION VDIODE is less than the voltage across RSENSE. Adding an optional external 100Ω resistor in parallel with the internal 1k resistor forces the diode voltage closer to the sensed current limit voltage and reduces the current limit error. Alternatively, the base-emitter junctions of back-to-back 2N3904 NPN transistors can provide this clamping action. These diodes begin to conduct at a higher voltage level nearer to 600mV.
PAGE 18
LT1970 APPLICATIONS INFORMATION OPTIONAL TEST PIN ON/OFF CONTROL APPLY LOAD DRIVE 5V Hi-Z 0V 5V VOUT = 15V VCC CLR VREF ( ) CODE C – CODE D ≈ ±15V 1024 ISOURCE(MAX) = 0.5 • CODE B ≈ –4mA TO –500mA 1024 • RS DAC A ISINK(MAX) = 0.5 • CODE A ≈ 4mA TO 500mA 1024 • RS 18V 3-WIRE SERIAL INTERFACE CS/LD SCK DI R6 3k R5 3k DAC B + 10μF 0.1μF DECODER VCSRC VCSNK R1 3.4k DAC C +IN EN R2 10.2k V+ ISRC ISNK RS 1Ω TSD OUT LT1970 SENSE+ SENSE– FILTER V– VEE R3 3.
PAGE 19
LT1970 APPLICATIONS INFORMATION VCC 0V TO 1V 12V VCSRC VCSNK +IN EN VCC V+ ISRC ISNK RS 0.2Ω TSD OUT LT1970 SENSE+ – SENSE FILTER V– VEE –IN RLOAD COMMON R4 255k LT1787 RF VS+ BIAS –12V R1 60.4k 20k VEE 12V – R2 10k + VOUT 2.5V ±5mV/mA LT1880 R3 20k –12V 1kHz FULL CURRENT BANDWIDTH –12V 0V TO 5V A/D 1970 F10 OPTIONAL DIGITAL FEEDBACK Figure 10.
PAGE 20
LT1970 APPLICATIONS INFORMATION R6 18.2k 15V VCSRC VCSNK R5 13k –IN VCC R8 3k +OUT CURRENT LIMIT THERMAL FAULT 0.1 V+ ISRC ISNK 10μF RS1 1Ω TSD OUT LT1970 SENSE+ SENSE– FILTER V– VEE +IN + R3 23.2k R4 10k 5V REF VOUT ADJUST R2 10k C1 1μF –15V + CURRENT LIMIT ADJUST 15V R11 10k 1/2 LT1881 – R12 10k R9 10k 1% OPTIONAL SYMMETRY ADJUST 100Ω – R1 6.19k +OUT 0V TO 12V 4mA TO 150mA C2 10μF COMMON 18V LT1634-5 EN + R7 3k 1/2 LT1881 + R13 25.
PAGE 21
LT1970 APPLICATIONS INFORMATION range all the way to 0V, an LTC1046 charge pump inverter is used to develop a –5V supply. This produces a negative rail for the LT1970 which has to sink only the quiescent current of the ampliﬁer, typically 7mA. Using a second LT1970, a 0V to ±12V dual tracking power supply is shown in Figure 12. The midpoint of two 10k resistors connected between the + and – outputs is held at 0V by the LT1881 dual op amp servo feedback loop.
PAGE 22
LT1970 APPLICATIONS INFORMATION For motor speed control without using a tachometer, the circuit in Figure 14 shows an approach. Using the enable feature of the LT1970, the drive to the motor can be removed periodically. With no drive applied, the spinning motor presents a back EMF voltage proportional to its rotational speed. The LT1782 is a tiny rail-to-rail ampliﬁer with a shutdown pin. The ampliﬁer is enabled during this interval to sample the back EMF voltage across the motor.
PAGE 23
LT1970 APPLICATIONS INFORMATION 12V OV TO 5V TORQUE/STALL CURRENT CONTROL FWD 5V VCSRC VCSNK R1 10k +IN STOP R2 20k FAULT/STALL VCC V+ ISRC ISNK –IN EN TSD OUT LT1970 SENSE+ – SENSE FILTER V– VEE RS 1Ω 12V DC MOTOR COM C1 4.7μF –12V R6 49.9k R14 10k R4 100k 12V – R15 100Ω + C2 0.01μF –12V SHDN –12V R13 10k 12V R12 10k 12V LT1782 + 1/2 LT1638 R5 120k – MOTOR SPEED CONTROL 0V REV R3 2k R7 10k R8 20k + 1/2 LT1638 – R9 20k D1 R10 82.5k 1N4148 C3 0.1μF D2 R11 9.
PAGE 24
LT1970 PACKAGE DESCRIPTION FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev I) Exposed Pad Variation CA 6.40 – 6.60* (.252 – .260) 4.95 (.195) 4.95 (.195) 20 1918 17 16 15 14 13 12 11 6.60 ±0.10 2.74 (.108) 4.50 ±0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.25 REF 0.50 – 0.75 (.020 – .030) NOTE: 1.
PAGE 25
LT1970 REVISION HISTORY (Revision history begins at Rev C) REV DATE DESCRIPTION C 07/12 Corrected Block Diagram PAGE NUMBER 10 Changed supply voltage, added R6 in ﬁgure 14. 23 1970fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PAGE 26
LT1970 APPLICATIONS INFORMATION CURRENT LIMIT CONTROL VOLTAGE 0V TO 5V VCC 15V R2 100Ω 10μF 0.1μF IRF9530 VCC ENABLE VCSRC +IN VCSNK R1 1k R4 100Ω V+ LT1970 –IN SENSE+ SENSE– COMMON V– OUT R5 100Ω * VEE VIN * RF 2.2k RG 2.2k RCS 0.1Ω 5W * * LOAD IRF530 R3 100Ω VEE –15V *OPTIONAL, SEE TEXT 10μF 0.1μF 1970 F15 Figure 15.