Datasheet

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LT1995

1995fb

–

INPUT

RANGE

–15V TO 15V

LT1995

–15V

1995 TA01a

15V

OUT

REF

M1 M2 M4

P1 P2 P4

, LTC and LT are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

32MHz, 1000V/µs

Gain Selectable Amplifier

■

Internal Gain Setting Resistors

■

Pin Configurable as a Difference Amplifier,

Inverting and Noninverting Amplifier

■

Difference Amplifier:

Gain Range 1 to 7

CMRR > 65dB

■

Noninverting Amplifier:

Gain Range 1 to 8

■

Inverting Amplifier:

Gain Range –1 to –7

■

Gain Error: <0.2%

■

Slew Rate: 1000V/µs

■

Bandwidth: 32MHz (Gain = 1)

■

Op Amp Input Offset Voltage: 2.5mV Max

■

Quiescent Current: 9mA Max

■

Wide Supply Range: ±2.5V to ±15V

■

Available in 10-Lead MSOP and

10-Lead (3mm × 3mm) DFN Packages

■

Instrumentation Amplifier

■

Current Sense Amplifier

■

Video Difference Amplifier

■

Automatic Test Equipment

High Slew Rate Differential Gain of 1

FEATURES

APPLICATIO S

TYPICAL APPLICATIO

DESCRIPTIO

The LT

1995 is a high speed, high slew rate, gain select-

able amplifier with excellent DC performance. Gains from

–7 to 8 with a gain accuracy of 0.2% can be achieved using

no external components. The device is particularly well

suited for use as a difference amplifier, where the excellent

resistor matching results in a typical common mode

rejection ratio of 79dB.

The amplifier is a single gain stage design similar to the

LT1363 and features superb slewing and settling charac-

teristics. Input offset of the internal operational amplifier

is less than 2.5mV and the slew rate is 1000V/µs. The

output can drive a 150Ω load to ±2.5V on ±5V supplies,

making it useful in cable driver applications.

The resistors have excellent matching, 0.2% maximum at

room temperature and 0.3% from –40°C to 85°C. The

temperature coefficient of the resistors is typically

–30ppm/°C. The resistors are extremely linear with volt-

age, resulting in a gain nonlinearity of 10ppm.

The LT1995 is fully specified at ±2.5V, ±5V and ±15V sup-

plies and from –40°C to 85°C. The device is available in

space saving 10-lead MSOP and 10-Lead (3mm × 3mm)

DFN packages. For a micropower precision amplifier with

precision resistors, see the LT1991 and LT1996.

Large-Signal Transient (G = 1)

1995 TA01b

Summary of content (20 pages)

PAGE 1
LT1995 32MHz, 1000V/µs Gain Selectable Amplifier U FEATURES DESCRIPTIO ■ The LT®1995 is a high speed, high slew rate, gain selectable amplifier with excellent DC performance. Gains from –7 to 8 with a gain accuracy of 0.2% can be achieved using no external components. The device is particularly well suited for use as a difference amplifier, where the excellent resistor matching results in a typical common mode rejection ratio of 79dB.
PAGE 2
LT1995 U W W W ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V–) .............................. 36V Input Current (Note 2) ....................................... ±10mA Output Short-Circuit Duration (Note 3) ........... Indefinite Operating Temperature Range (Note 4) .. – 40°C to 85°C Specified Temperature Range (Note 5) ... – 40°C to 85°C Storage Temperature Range MS Package .................................... – 65°C to 150°C DD Package .....................................
PAGE 3
LT1995 ELECTRICAL CHARACTERISTICS Difference Amplifier Configuration. TA = 25°C, VREF = VCM = 0V and unused gain pins are unconnected, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VSUPPLY VOS_OA Op Amp Input Offset Voltage (Note 10) G = 1 (MS10) G = 1 (DD10) ±2.5V, ±5V, ±15V ±2.5V, ±5V, ±15V en Input Noise Voltage G = 1, f = 10kHz G = 2, f = 10kHz G = 4, f = 10kHz ±2.5V to ±15V ±2.5V to ±15V ±2.
PAGE 4
LT1995 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C. Difference Amplifier Configuration. VREF = VCM = 0V and unused gain pins are unconnected, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VSUPPLY GE Gain Error VOUT = ±12V, RL = 1k, G = 1 VOUT = ±12V, RL = 1k, G = 2 VOUT = ±12V, RL = 1k, G = 4 VOUT = ±2.5V, RL = 500Ω, G = 1 VOUT = ±2.
PAGE 5
LT1995 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C. Difference Amplifier Configuration. VREF = VCM = 0V and unused gain pins are unconnected, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VSUPPLY VOS Input Offset Voltage Referred to Input (Note 7) G = 1 (MS10) G = 1 (DD10) G = 2 (MS10) G = 2 (DD10) G = 4 (MS10) G = 4 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) ±15V ±15V ±15V ±15V ±15V ±15V ±5V ±5V ±2.5V ±2.
PAGE 6
LT1995 U W TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration) Supply Current vs Supply Voltage and Temperature VOS Distribution 25 10 15 10 INPUT VOLTAGE NOISE (nV/√Hz) TA = 125°C 8 SUPPLY CURRENT (mA) TA = 25°C 6 TA = –55°C 4 5 2 0 1.5 2.5 –3.5 –2.5 –1.5 –0.5 0.5 INPUT OFFSET VOLTAGE (mV) 0 3.5 10 5 15 SUPPLY VOLTAGE (±V) 0 1995 G01 G=2 G=1 –0.03 –1.5 RL = 500Ω 1.
PAGE 7
LT1995 U W TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration) Settling Time vs Output Step (Non-Inverting) Settling Time vs Output Step (Inverting) 10 10 VS = ±15V 8 TA = 25°C RL = 1k 6 G = –1 VS = ±15V 8 TA = 25°C RL = 1k 6 G=1 10mV 2 OUTPUT STEP (V) 4 1mV 0 –2 10mV 1mV –4 1M 10M FREQUENCY (Hz) 100M –8 20 0 40 60 80 100 120 140 160 180 SETTLING TIME (ns) 1mV 20 0 40 60 80 100 120 140 160 SETTLING TIME (ns) 1995 G12 30 –3dB BANDWIDTH 30 25 20 42 OVERSHOOT CL =
PAGE 8
LT1995 U W TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration) Power Supply Rejection Ratio vs Frequency Slew Rate vs Supply Voltage VS = ±15V TA = 25°C G=1 70 TA = 25°C 1400 G = –1 + VOUT = VS – VS– – 3VP-P +PSRR 50 –PSRR 40 30 20 10 0 –10 10k 1k 1M 100k FREQUENCY (Hz) 1400 1200 60 10M 1000 800 600 5 0 10 1000 800 600 400 6 8 10 12 14 16 18 20 INPUT LEVEL (VP-P) 30 TA = 25°C Vo = 3VRMS RL = 500Ω 25 0.001 G=1 G = –1 0.0001 0.01 0 0.
PAGE 9
LT1995 U W TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration) Capacitive Load Handling Capacitive Load Handling 100 100 70 G=1 G=2 G=4 OVERSHOOT (%) OVERSHOOT (%) VS = ±15V 90 TA = 25°C RL = ∞ 80 G=7 60 50 40 30 VS = ±5V 90 TA = 25°C RL = ∞ 80 G=1 70 50 30 20 10 1000pF 0.01µF 0.1µF CAPACITIVE LOAD 0 10pF 1µF G=7 40 10 100pF G=4 60 20 0 10pF G=2 100pF 1000pF 0.01µF 0.
PAGE 10
LT1995 U U U PI FU CTIO S (Difference Amplifier Configuration) P1 (Pin 1): Noninverting Gain-of-1 Input. Connects a 4k internal resistor to the op amp’s noninverting input. OUT (Pin 6): Output Voltage. VOUT = VREF + 1 • (VP1 – VM1) + 2 • (VP2 – VM2) + 4 • (VP4 – VM4). P2 (Pin 2): Noninverting Gain-of-2 Input. Connects a 2k internal resistor to the op amp’s noninverting input. VS+ (Pin 7): Positive Supply Voltage. P4 (Pin 3): Noninverting Gain-of-4 Input.
PAGE 11
LT1995 W BLOCK DIAGRA VS+ 1 2 3 P1 7 RP1 = 4k RFB = 4k 0.5pF 0.3pF P2 RP2 = 2k P4 RP4 = 1k M4 RM4 = 1k M2 RM2 = 2k REF 5 + – 8 9 10 M1 0.5pF 0.3pF RM1 = 4k RFB = 4k VS– 4 OUT 6 1995 BD U W U U APPLICATIO S I FOR ATIO Configuration Flexibility The LT1995 combines a high speed precision operational amplifier with eight ratio-matched on-chip resistors. The resistor configuration and pinout of the device is shown in the Block Diagram.
PAGE 12
LT1995 U W U U APPLICATIO S I FOR ATIO As shown in Figure 1, the options for fixed gain G include: 1, 1.33, 1.67, 2, 3, 4, 5, 6 and 7, all achieved by pinstrapping alone. With split-supply applications where the output is to be ground referenced, the VREF input is simply tied to ground. The input common mode voltage is rejected by the high CMRR of the part within the usable input range.
PAGE 13
LT1995 U W U U APPLICATIO S I FOR ATIO 8 9 VIN– 10 VIN+ 1 2 3 +V M4 M2 M1 P1 P4 VOUT REF 5 P2 4 9 10 6 LT1995 8 VIN– 7 1 2 3 VIN+ VREF +V M4 M2 M1 P1 P4 –V VOUT REF 5 P2 1 2 9 10 1 VIN+ VIN– 2 3 8 9 10 1 2 VIN+ 3 M1 8 7 M1 VIN– 6 LT1995 P1 P2 4 9 10 VOUT REF 5 6 LT1995 P1 REF 5 P2 –V 1 2 VIN+ 3 VREF G = 1.67 +V M4 7 M2 M1 P1 P4 VOUT REF 5 P2 4 9 10 6 LT1995 8 VIN– 1 2 3 VIN+ VREF +V M4 7 M2 M1 6 LT1995 P1 REF 5 P2 4 P4 –V –V G = 2.
PAGE 14
LT1995 U W U U APPLICATIO S I FOR ATIO 8 9 10 1 2 3 +V M4 8 7 9 M2 M1 6 LT1995 P1 REF 5 P2 P4 10 VOUT 1 2 3 4 +V M4 8 7 9 M2 M1 6 LT1995 P1 REF 5 P2 P4 –V 10 VOUT 2 3 4 9 10 1 2 3 9 M2 M1 6 LT1995 P1 REF 5 P2 10 VOUT 1 2 3 4 8 7 9 M2 M1 6 LT1995 P1 REF 5 P2 P4 10 VOUT 9 10 1 2 3 3 4 7 9 M2 M1 6 LT1995 REF 5 P1 P2 10 VOUT 1 2 3 4 +V 7 M1 9 6 LT1995 REF 5 P1 P2 P4 10 VOUT 1 2 3 M1 9 6 LT1995 P1 REF 5 P2 P4 2 3 4 10 VOUT 1 2 3 4 8 7
PAGE 15
LT1995 U W U U APPLICATIO S I FOR ATIO 8 * VIN 9 10 1 2 3 8 * 9 10 1 2 VIN 3 8 * 9 10 1 VIN 2 3 +V M4 8 7 M2 * M1 6 LT1995 P1 REF 5 P2 P4 VOUT 1 VIN 4 3 7 M2 * M1 6 LT1995 P1 REF 5 P2 VOUT 1 VIN 2 3 4 P4 9 10 +V M4 7 M2 M1 6 LT1995 P1 REF 5 P2 P4 –V –V A = 0.857 A = 0.
PAGE 16
LT1995 U W U U APPLICATIO S I FOR ATIO In operation as a noninverting gain stage, the P and REF inputs may be configured as a “supply splitter,” thereby providing a convenient mid-supply operating point. Figure 7 illustrates the three attenuation configurations that generate 50% mid-supply biasing levels with no external components aside from the desired coupling capacitors.
PAGE 17
LT1995 U W U U APPLICATIO S I FOR ATIO If one of the A parameter configurations in Figure 3 is preferred, or the use of an external biasing source is desired, the P and REF input connections shown grounded in a Figure 3 circuit may be instead driven by a VBIAS voltage to establish a quiescent operating point for the input and output pins. The VIN connections of the Figure 3 circuit are then driven via a coupling capacitor.
PAGE 18
LT1995 U W U U APPLICATIO S I FOR ATIO and power dissipation (PD) as follows for a nominal PCB layout: TJ = TA + (PD • θJA) For example, in order to maintain a maximum junction temperature of 150°C at 85°C ambient in an MS10 package, the power must be limited to 0.4W. It is important to note that when operating at ±15V supplies, the quiescent current alone will typically account for 0.24W, so careful thermal management may be required if high load currents and high supply voltages are involved.
PAGE 19
LT1995 U PACKAGE DESCRIPTIO MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 10 9 8 7 6 DETAIL “A” 0.254 (.010) 3.20 – 3.45 (.126 – .136) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) 0° – 6° TYP GAUGE PLANE 0.50 0.305 ± 0.038 (.0197) (.0120 ± .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 0.497 ± 0.076 (.0196 ± .003) REF 0.53 ± 0.152 (.021 ± .006) 1 2 3 4 5 DETAIL “A” 0.86 (.
PAGE 20
LT1995 U TYPICAL APPLICATIO S Tracking Negative Reference High Input Impedance Precision Gain of 2 Configuration 3V 8 9 10 1 2 3 +V M4 1.25V LT1790-1.25 7 M2 M1 6 LT1995 VOUT REF 5 P1 P2 IIN = 600nA 4 P4 M1 LT1995 G = –1 P1 1µF –V –1.25V REF 1995 TA03 1995 TA02 VIN –3V 0A to 2A Current Source Current Sense with Alarm 15V 15V TO –15V 15V I RS 0.2Ω 15V M4 M1 P1 P4 LT1995 G=5 LT6700-3 10nF P1 0.