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LT3435

3435fa

TYPICAL APPLICATIO

APPLICATIO S

FEATURES

DESCRIPTIO

High Voltage 3A, 500kHz

Step-Down Switching Regulator

with 100µA Quiescent Current

, LTC and LT are registered trademarks of Linear Technology Corporation.

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High Voltage Power Conversion

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14V and 42V Automotive Systems

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Industrial Power Systems

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Distributed Power Systems

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Battery-Powered Systems

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USB Powered Systems

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Wide Input Range: 3.3V to 60V

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3A Peak Switch Current

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Burst Mode

Operation: 100µA Quiescent Current**

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Low Shutdown Current: I

< 1µA

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Power Good Flag with Programmable Threshold

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Load Dump Protection to 60V

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500kHz Switching Frequency

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Saturating Switch Design: 0.1Ω On-Resistance

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Peak Switch Current Maintained Over

Full Duty Cycle Range*

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1.25V Feedback Reference Voltage

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Easily Synchronizable

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Soft-Start Capability

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Small 16-Pin Thermally Enhanced TSSOP Package

The LT

3435 is a 500kHz monolithic buck switching

regulator that accepts input voltages up to 60V. A high

efficiency 3A, 0.1Ω switch is included on the die along with

all the necessary oscillator, control and logic circuitry.

Current mode topology is used for fast transient response

and good loop stability.

Innovative design techniques along with a new high volt-

age process achieve high efficiency over a wide input

range. Efficiency is maintained over a wide output current

range by employing Burst Mode operation at low currents,

utilizing the output to bias the internal circuitry, and by

using a supply boost capacitor to fully saturate the power

switch. Patented circuitry maintains peak switch current

over the full duty cycle range.* Shutdown reduces input

supply current to less than 1µA. External synchronization

can be implemented by driving the SYNC pin with logic-level

inputs. A single capacitor from the C

pin to the output

provides a controlled output voltage ramp (soft-start). The

device also has a power good flag with a programmable

threshold and time-out and thermal shutdown protection.

The LT3435 is available in a 16-pin TSSOP package with an

exposed pad leadframe for low thermal resistance.

14V to 3.3V Step-Down Converter with

100µA No Load Quiescent Current

Efficiency and Power Loss

vs Load CurrentSupply Current vs Input Voltage

Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks

are the property of their respective owners. *Protected by U.S. Patents including 6498466

**See Burst Mode Operation section for conditions.

SHDN

BOOST

BIAS

PGFB

LT3435

4.7µF

100V

CER

470pF

0.33µF

0.1µF

15µH

4148

1µF

SYNC

GND

100µF

10V

TANT

OUT

3.3V

B360A

4700pF

10k

165k

100k

3435 TA01

27pF

LOAD CURRENT (A)

0.0001

EFFICIENCY (%)

0.001

0.01

0.1 1

3435 TA02

100

0.001

POWER LOSS (W)

0.1

0.01

= 12V

TYPICAL

POWER LOSS

OUT

= 5V

OUT

= 3.3V

EFFICIENCY

INPUT VOLTAGE (V)

SUPPLY CURRENT (µA)

100

30 40

3435 TA03

150

125

OUT

= 3.3V

= 25°C

Summary of content (24 pages)

PAGE 1
LT3435 High Voltage 3A, 500kHz Step-Down Switching Regulator with 100µA Quiescent Current DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LT®3435 is a 500kHz monolithic buck switching regulator that accepts input voltages up to 60V. A high efficiency 3A, 0.1Ω switch is included on the die along with all the necessary oscillator, control and logic circuitry. Current mode topology is used for fast transient response and good loop stability. Wide Input Range: 3.
PAGE 2
LT3435 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) VIN, SHDN, BIAS, PGOOD, SW ............................... 60V BOOST Pin Above SW ............................................ 35V BOOST Pin Voltage ................................................. 68V SYNC, CSS, PGFB, FB ................................................ 6V Operating JunctionTemperature Range (Note 2) ........................................... – 40°C to 125°C Storage Temperature Range .................
PAGE 3
LT3435 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, SHDN = 12V, BIAS = 5V, FB/PGFB = 1.25V, CSS/SYNC = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX EA Source Current FB = 1.15V 20 40 55 µA EA Sink Current FB = 1.35V 15 30 40 µA FB = 1.15V 2.1 2.2 2.4 V 3 5.2 6.5 A 0.1 0.
PAGE 4
LT3435 U W TYPICAL PERFOR A CE CHARACTERISTICS Oscillator Frequency 1.29 540 1.28 530 1.27 520 1.26 1.25 1.24 1.23 490 460 100 50 25 0 75 TEMPERATURE (°C) 100 1.00 –50 –25 125 Shutdown Supply Current 200 180 20 4.5 3.0 2.5 140 CURRENT (µA) CURRENT (µA) CURRENT (µA) 4.0 3.5 VBIAS = 0V 160 VIN = 60V 15 10 2.0 120 100 80 VBIAS = 5V 60 1.5 5 40 VIN = 42V 1.0 0 10 30 40 20 SHDN VOLTAGE (V) 50 0 –50 –25 60 VIN = 12V 50 25 0 75 TEMPERATURE (°C) 100 0 –50 –25 125 1.
PAGE 5
LT3435 U W TYPICAL PERFOR A CE CHARACTERISTICS Soft-Start Current Threshold vs FB Voltage 50 6.0 90 40 35 5.0 CURRENT (µA) PEAK SWITCH CURRENT (A) 100 TJ = 25°C 45 5.5 Oscillator Frequency vs FB Voltage NORMALIZED FREQUENCY (%) Switch Peak Current Limit 4.5 4.0 SOFT-START DEFEATED 30 25 20 15 10 3.5 0 –0 25 50 75 TEMPERATURE (°C) 100 0.2 0.6 0.8 0.4 FB VOLTAGE (V) 1.0 Switch On Voltage (VCESAT) 200 TJ = –40°C START-UP 6.0 VOUT = 5V 5.5 RUNNING 5.0 START-UP 4.5 100 VOUT = 3.
PAGE 6
LT3435 U W TYPICAL PERFOR A CE CHARACTERISTICS Dropout Operation 4.0 VOUT = 3.3V BOOST DIODE = DIODES INC DFLS160 3.5 Burst Mode Operation VOUT = 5V BOOST DIODE = DIODES INC DFLS160 VOUT 50mV/DIV AC-COUPLED 5 3.0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Dropout Operation 6 2.5 2.0 1.5 LOAD CURRENT = 2.5A 1.0 LOAD CURRENT = 250mA 4 3 LOAD CURRENT = 2.5A 2 VIN = 12V VOUT = 3.3V LOAD CURRENT = 250mA 1 0.5 ISW 500mA/DIV 10ms/DIV 3435 G21 0 0 2 2.5 3 3.5 4 4.5 5 INPUT VOLTAGE (V) 5.
PAGE 7
LT3435 U U U PI FU CTIO S When the PGFB pin rises above VPGFB, current is sourced from the CT pin into the external capacitor. When the voltage on the external capacitor reaches an internal clamp (VCT), the PG pin becomes a high impedance node. The resultant PG delay time is given by t = CCT • VCT/ICT. If the voltage on the PGFB pin drops below VPGFB, CCT will be discharged rapidly to 0V and PG will be active low with a 200µA sink capability.
PAGE 8
LT3435 W BLOCK DIAGRA 4 VIN INTERNAL REF UNDERVOLTAGE LOCKOUT 10 14 15 BIAS THERMAL SHUTDOWN 2.4V SLOPE COMP Σ 500kHz OSCILLATOR + CURRENT COMP – SYNC SHDN BOOST ANTISLOPE COMP + R SHDN COMP S – SWITCH Q LATCH DRIVER CIRCUITRY SW 1.3V 9 12 CSS FB SOFT-START BURST MODE DETECT FOLDBACK DETECT VC CLAMP 6 2 – ERROR AMP 1.25V 11 13 + VC PG PGFB 16 + PG COMP 1.12V 1.2V CT CLAMP – GND 17 7 PGND 8 CT 3435 BD Figure 1.
PAGE 9
LT3435 W BLOCK DIAGRA power from the VIN pin, but if the BIAS pin is connected to an external voltage higher than 3V bias power will be drawn from the external source (typically the regulated output voltage). This improves efficiency. High switch efficiency is attained by using the BOOST pin to provide a voltage to the switch driver which is higher than the input voltage, allowing switch to be saturated. This boosted voltage is generated with an external capacitor and diode.
PAGE 10
LT3435 U W U U APPLICATIO S I FOR ATIO and Soft-Start Current graphs in Typical Performance Characteristics). Frequency foldback is done to control power dissipation in both the IC and in the external diode and inductor during short-circuit conditions. A shorted output requires the switching regulator to operate at very low duty cycles. As a result the average current through the diode and inductor is equal to the short-circuit current limit of the switch (typically 4.7A for the LT3435).
PAGE 11
LT3435 U W U U APPLICATIO S I FOR ATIO taken to ensure the ripple and surge ratings are not exceeded. The AVX TPS and Kemet T495 series are surge rated AVX recommends derating capacitor operating voltage by 2:1 for high surge applications. OUTPUT CAPACITOR Output capacitor ripple current (RMS) The output capacitor is normally chosen by its effective series resistance (ESR) because this is what determines output ripple voltage.
PAGE 12
LT3435 U W U U APPLICATIO S I FOR ATIO does not fall off at high duty cycles. Most current mode converters suffer a drop off of peak switch current for duty cycles above 50%. This is due to the effects of slope compensation required to prevent subharmonic oscillations in current mode converters. (For detailed analysis, see Application Note 19.) VOUT 20mV/DIV AC-COUPLED COUT = 100µF TANTALUM ESR 100mΩ VOUT 20mV/DIV AC-COUPLED COUT = 100µF CERAMIC VSW 5V/DIV VIN = 12V VOUT = 3.
PAGE 13
LT3435 U W U U APPLICATIO S I FOR ATIO To calculate actual peak switch current in continuous mode with a given set of conditions, use: ISW(PK) = IOUT + ( VOUT VIN – VOUT ( )( )( ) ) 2 L f VIN If a small inductor is chosen which results in discontinous mode operation over the entire load range, the maximum load current is equal to: ( )( )( ) IOUT(MAX) = 2(VOUT )(VIN – VOUT ) 2 IPK 2 f L VIN CHOOSING THE INDUCTOR For most applications the output inductor will fall in the range of 5µH to 33µH.
PAGE 14
LT3435 U W U U APPLICATIO S I FOR ATIO 3. Decide if the design can tolerate an “open” core geometry like a rod or barrel, which have high magnetic field radiation, or whether it needs a closed core like a toroid to prevent EMI problems. This is a tough decision because the rods or barrels are temptingly cheap and small and there are no helpful guidelines to calculate when the magnetic field radiation will be a problem. 4.
PAGE 15
LT3435 U W U U APPLICATIO S I FOR ATIO ramp rate. When the current through the CSS capacitor exceeds the CSS threshold (ICSS), the voltage ramp of the output capacitor is limited by reducing the VC pin voltage. The CSS threshold is proportional to the FB voltage (see Typical Performance Characteristics) and is defeated for FB voltages greater than 0.9V (typical).
PAGE 16
LT3435 U W U U APPLICATIO S I FOR ATIO If a no load condition can be anticipated, the supply current can be further reduced by cycling the SHDN pin at a rate higher than the natural no load burst frequency. Figure 6 shows Burst Mode operation with the SHDN pin. VOUT burst ripple is maintained while the average supply current drops to 15µA. The PG pin will be active low during the “on” portion of the SHDN waveform due to the CT capacitor discharge when SHDN is taken low.
PAGE 17
LT3435 U W U U APPLICATIO S I FOR ATIO output voltage is less than 3.3V it is recommended that an alternate boost supply is used. The boost diode can be connected to the input (Figure 7b) but care must be taken to prevent the boost voltage (VBOOST = VIN • 2) from exceeding the BOOST pin absolute maximum rating. The additional voltage across the switch driver also increases power loss and reduces efficiency.
PAGE 18
LT3435 U W U U APPLICATIO S I FOR ATIO Example: R1 = R3 = 12 – 2 ( ) 1.5 5µA ( 5 1.3MΩ 1 = 1.3MΩ ) = 6.5MΩ (Nearest 1% 6.49MΩ) 1.3 R2 = 1.3 7 – 1.3 – 1µA – 6.49MΩ 1.3MΩ = 408k (Nearest 1% 412k) See the Typical Performance Characteristics section for graphs of SHDN and VIN currents verses input voltage.
PAGE 19
LT3435 U W U U APPLICATIO S I FOR ATIO threshold during normal operation, the CT pin will be discharged and PG inactive, resulting in a non Power Good cycle when SHDN is taken above its threshold. Figure 9 shows the power good operation with PGFB connected to FB and the capacitance on CT = 0.1µF. The PGOOD pin has a limited amount of drive capability and is susceptible to noise during start-up and Burst Mode operation.
PAGE 20
LT3435 U W U U APPLICATIO S I FOR ATIO parasitic inductance produces a flyback spike across the LT3435 switch. When operating at higher currents and input voltages, with poor layout, this spike can generate voltages across the LT3435 that may exceed its absolute maximum rating. A ground plane should always be used under the switcher circuitry to prevent interplane coupling and overall noise. The VC and FB components should be kept as far away as possible from the switch and boost nodes.
PAGE 21
LT3435 U W U U APPLICATIO S I FOR ATIO Example: with VIN = 25V, VOUT = 5V and IOUT = 2A: PSW 2 0.15)(2) (5) ( = + 25 0.12 + 0.962 = 1.08 PBOOST = (77e )(12/ )(2)(25)(500e3) –9 / ) (5)2 (240 = 0.03 W 40 PQ = 40(0.0026) + 5(0.001) = 0.11W Total power dissipation is: PTOT = 1.08 + 0.03+ 0.11 = 1.22W Thermal resistance for the LT3435 package is influenced by the presence of internal or backside planes. With a full plane under the FE16 package, thermal resistance will be about 45°C/W.
PAGE 22
LT3435 U W U U APPLICATIO S I FOR ATIO catch diode and connecting the VC compensation to a ground track carrying significant switch current. In addition the theoretical analysis considers only first order nonideal component behavior. For these reasons, it is important that a final stability check is made with production layout and components.
PAGE 23
LT3435 U PACKAGE DESCRIPTIO FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation BC 4.90 – 5.10* (.193 – .201) 3.58 (.141) 3.58 (.141) 16 1514 13 12 1110 6.60 ±0.10 9 2.94 (.116) 4.50 ±0.10 6.40 2.94 (.252) (.116) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2.
PAGE 24
LT3435 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1074/LT1074HV 4.4A (IOUT), 100kHz, High Efficiency Step-Down DC/DC Converters VIN: 7.3V to 45V/64V, VOUT(MIN) = 2.21V, IQ = 8.5mA, ISD < 10µA, DD5/7, TO220-5/7 LT1076/LT1076HV 1.6A (IOUT), 100kHz, High Efficiency Step-Down DC/DC Converters VIN: 7.3V to 45V/64V, VOUT(MIN) = 2.21V, IQ = 8.5mA, ISD < 10µA, DD5/7, TO220-5/7 LT1676 60V, 550mA (ISW), 100kHz, High Efficiency Step-Down DC/DC Converter VIN: 7.4V to 60V, VOUT(MIN) = 1.24V, IQ = 3.