Datasheet

LT8582
22
8582f
APPLICATIONS INFORMATION
Single Inductor Inverting Topology
If there is a need to use just one inductor to generate a
negative output voltage whose magnitude is greater than
V
IN
, the single inductor inverting topology (shown in
Figure 12) can be used. Since the master and slave switches
are isolated by a Schottky diode, the current spike through
C1 will flow only through the slave switch, preventing the
current comparator, (A4 in the Block Diagram) from false
tripping. Output disconnect is inherently built into the
single inductor topology.
HOT-PLUG
High inrush currents associated with hot-plugging V
IN
can
largely be rejected with the use of an external PMOS. A
simple hot-plug controller can be designed by connecting
an external PMOS in series with V
IN
, with the gate of the
PMOS being driven by the GATE pin of the LT8582. The
GATE pin pull-down current is linearly proportional to the
SS voltage. Since the SS charge up time is relatively slow,
the GATE pin pull-down current will increase gradually,
thereby turning on the external PMOS slowly. Controlled
in this manner, the PMOS acts as an input current limiter
when V
IN
hot-plugs or ramps up sharply.
Likewise, when the PMOS is connected in series with the
output, inrush current into the output capacitor can be
limited during a hot-plug event. To illustrate this, the circuit
in Figure 5 was reconfigured by adding a large 1500F
capacitor to the output. An 18 resistive load was used
and C
SS
was increased to 10F. Figure 13 shows the results
of hot-plugging this reconfigured circuit. Notice how the
inductor current is well behaved.
Figure 12. Single Inductor Inverting Topology
Figure 13. V
IN
Hot-Plug Control. Inrush Current Is Well Controlled
SSGND
SYNC
SWB
C1
SWA
LT8582
CHx
8582 F12
PG
RT
V
IN
SHDN
CLKOUT
V
C
FBX
GATE
V
OUT
< 0V
AND
|V
OUT
| > V
IN
V
IN
100k
R
T
R
C
L1
D1 D3
D2
R
FBX
C
IN
C
SS
C
C
C
F
C
OUT
V
IN
5V/DIV
V
OUT1
10V/DIV
I
L1
2A/DIV
2s/DIV
SS1
1V/DIV
8582 F13