Datasheet

LT8608/LT8608B
15
Rev. D
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When in Burst Mode operation for light-load currents, the
current through the V
IN(EN)
resistor network can easily be
greater than the supply current consumed by the LT8608.
Therefore, the V
IN(EN)
resistors should be large to minimize
their effect on efficiency at low loads.
INTV
CC
Regulator
An internal low dropout (LDO) regulator produces the 3.5V
supply from V
IN
that powers the drivers and the internal
bias circuitry. The INTV
CC
can supply enough current for
the LT8608’s circuitry and must be bypassed to ground
with a minimum of 1μF ceramic capacitor. Good bypassing
is necessary to supply the high transient currents required
by the power MOSFET gate drivers. Applications with high
input voltage and high switching frequency will increase die
temperature because of the higher power dissipation across
the LDO. Do not connect an external load to the INTV
CC
pin.
Output Voltage Tracking and Soft-Start (MSOP Only)
The LT8608 allows the user to program its output voltage
ramp rate by means of the TR/SS pin. An internal 2μA pulls
up the TR/SS pin to INTV
CC
. Putting an external capaci-
tor on TR/SS enables soft-starting the output to prevent
current surge on the input supply. During the soft-start
ramp the output voltage will proportionally track the
TR/SS pin voltage. For output tracking applications, TR/SS
can be externally driven by another voltage source. From
0V to 0.778V, the TR/SS voltage will override the internal
0.778V reference input to the error amplifier, thus regulat-
ing the FB pin voltage to that of TR/SS pin. When TR/SS
is above 0.778V, tracking is disabled and the feedback
voltage will regulate to the internal reference voltage.
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when
the faults are cleared. Fault conditions that clear the soft-
start capacitor are the EN/UV pin transitioning low, V
IN
voltage falling too low, or thermal shutdown. The LT8608
and LT8608B DFN do not have TR/SS pin or functionality.
Output Power Good
When the LT8608’s output voltage is within the ±8.5%
window of the regulation point, which is a V
FB
voltage in
the range of 0.716V to 0.849V (typical), the output voltage
APPLICATIONS INFORMATION
is considered good and the open-drain PG pin goes high
impedance and is typically pulled high with an external
resistor. Otherwise, the internal drain pull-down device
will pull the PG pin low. To prevent glitching both the
upper and lower thresholds include 0.5% of hysteresis.
The PG pin is also actively pulled low during several fault
conditions: EN/UV pin is below 1V, INTV
CC
has fallen too
low, V
IN
is too low, or thermal shutdown.
Synchronization (MSOP Only)
To select low ripple Burst Mode operation, tie the SYNC pin
below 0.4V (this can be ground or a logic low output). To
synchronize the LT8608 oscillator to an external frequency
connect a square wave (with 20% to 80% duty cycle) to
the SYNC pin. The square wave amplitude should have val-
leys that are below 0.9V and peaks above 2.7V (up to 5V).
The LT8608 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation. The LT8608
may be synchronized over a 200kHz to 2.2MHz range. The
R
T
resistor should be chosen to set the LT8608 switching
frequency equal to or below the lowest synchronization
input. For example, if the synchronization signal will be
500kHz and higher, the R
T
should be selected for 500kHz.
The slope compensation is set by the R
T
value, while the
minimum slope compensation required to avoid subhar-
monic oscillations is established by the inductor size,
input voltage, and output voltage. Since the synchroniza-
tion frequency will not change the slopes of the inductor
current waveform, if the inductor is large enough to avoid
subharmonic oscillations at the frequency set by RT, then
the slope compensation will be sufficient for all synchro-
nization frequencies.
For some applications it is desirable for the LT8608 to
operate in pulse-skipping mode, offering two major differ-
ences from Burst Mode operation. First is the clock stays
awake at all times and all switching cycles are aligned to the
clock. Second is that full switching frequency is reached at
lower output load than in Burst Mode operation as shown
in Figure 2 in an earlier section. These two differences come
at the expense of increased quiescent current. To enable
pulse-skipping mode the SYNC pin is floated.
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