Datasheet

24
LTC1090
1090fc
U
TYPICAL APPLICATIO
Sneak-A-Bit Code for the LTC1090 Using the MC68HC05C4
MNEMONIC DESCRIPTION
READ–/+: LDA #$3F Load D
IN
word for LTC1090 into ACC
JSR TRANSFER Read LTC1090 routine
LDA $60 Load MSBs from LTC1090 into ACC
STA $71 Store MSBs in $71
LDA $61 Load LSBs from LTC1090 into ACC
STA $72 Store LSBs in $72
RTS Return
READ+/–: LDA #$7F Load D
IN
word for LTC1090 into ACC
JSR TRANSFER Read LTC1090 routine
LDA $60 Load MSBs from LTC1090 into ACC
STA $73 Store MSBs in $73
LDA $61 Load LSBs from LTC1090 into ACC
STA $74 Store LSBs in $74
RTS Return
TRANSFER:BCLR 0, $02 CS goes low
STA $0C Load D
IN
into SPI. Start transfer
LOOP 1: TST $0B Test status of SPlF
BPL LOOP 1 Loop to previous instruction if not done
LDA $0C Load contents of SPI data reg into ACC
STA $0C Start next cycle
STA $60 Store MSBs in $60
LOOP 2: TST $0B Test status of SPlF
BPL LOOP 2 Loop to previous instruction if not done
BSET 0, $02 CS goes high
LDA $0C Load contents of SPI data reg into ACC
STA $61 Store LSBs in $61
RTS Return
CHK SIGN: LDA $73 Load MSBs of +/– read into ACC
ORA $74 Or ACC (MSBs) with LSBs of +/– read
BEQ MINUS If result is 0 goto minus
CLC Clear carry
ROR $73 Rotate right $73 through carry
ROR $74 Rotate right $74 through carry
LDA $73 Load MSBs of +/– read into ACC
STA $77 Store MSBs in RAM location $77
LDA $74 Load LSBs of +/– read into ACC
STA $87 Store LSBs in RAM location $87
BRA END Goto end of routine
MINUS: CLC Clear carry
ROR $71 Shift MSBs of – /+ read right
ROR $72 Shift LSBs of – /+ read right
COM $71 1’s complement of MSBs
COM $72 1’s complement of LSBs
LDA $72 Load LSBs into ACC
ADD #$01 Add 1 to LSBs
STA $72 Store ACC in $72
CLRA Clear ACC
ADC $71 Add with carry to MSBs. Result in ACC
STA $71 Store ACC in $71
STA $77 Store MSBs in RAM location $77
LDA $72 Load LSBs in ACC
STA $87 Store LSBs in RAM location $87
END: RTS Return
MNEMONIC DESCRIPTION
LDA #$50 Configuration data for SPCR
STA $0A Load configuration data into $0A
LDA #$FF Configuration data for port C DDR
STA $06 Load configuration data into port C DDR
BSET 0, $02 Make sure CS is high
JSR READ–/+ Dummy read configures LTC1090 for next
read
JSR READ+/– Read CH6 with respect to CH7
JSR READ–/+ Read CH7 with respect to CH6
JSR CHK SIGN Determines which reading has valid data,
converts to 2’s complement and stores in
RAM
SNEAK-A-BIT
Sneak-A-Bit Code for the LTC1090 Using the MC68HC05C4
LTC1090 • TA05
1ST CONVERSION
1ST CONVERSION
1024 STEPS
5V
–5V
5V
–5V
0V 0V 0V
2ND CONVERSION
1024 STEPS
SOFTWARE
2047 STEPS
( + ) CH6
( – ) CH7
V
IN
V
IN
2ND CONVERSION
SNEAK-A-BIT Code
( – ) CH6
( + ) CH7
V
IN
D
OUT
from LTC1090 in MC68HC05C4 RAM
D
IN
words for LTC1090
Location $77
Sign
LSB
B2 B1 B0
B10 B9 B8
filled with 0s
B7 B6 B5 B4 B3
Location $87
(ODD/SIGN)
MUX Addr. Word
Length
UNI
MSBF
D
IN
1
001 11111
D
IN
2
011 11111
D
IN
3
001 11111