Datasheet
18
LTC1091/LTC1092
LTC1093/LTC1094
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
Hardware and Software Interface to
Motorola MC68HC05C4 Processor
Motorola SPI (MC68HC05C4, MC68HC11)
The MC68HC05C4 has been chosen as an example of an
MPU with a dedicated serial port. This MPU transfers data
MSB first and in 8-bit increments. With two 8-bit transfers,
the A/D result is read into the MPU. The first 8-bit transfer
sends the D
IN
word to the LTC1091 and clocks B9 and B8
of the A/D conversion result into the processor. The
second 8-bit transfer clocks the remaining bits, B7 through
B0, into the MPU.
ANDing the first MPU received byte with 03 Hex clears the
six most significant bits. Notice how the position of the
start bit in the first MPU transmit word is used to position
the A/D result right justified in two memory locations.
X = DON’T CARE
1091/2/3/4 AI15
CLK
CS
D
OUT
MPU RECEIVED
WORD
MPU TRANSMIT
WORD
START
BIT
BYTE 1
D
IN
START
MSBF
MSBF X X X
B9
? ? ? 0 B9 B8
B8 B7 B6 B5 B4 B3 B2 B1 B0
SGL/
DIFF
ODD/
SIGN
SGL/
DIFF
ODD/
SIGN
0 1
BYTE 2 (DUMMY)
X X X X X X
X X
BYTE 1
1ST TRANSFER
? ?
BYTE 2
B5 B4 B3 B2 B1 B0
B7 B6
DON’T CARE
2ND TRANSFER
Data Exchange Between LTC1091 and MC68HC05C4
1091-4 AI16
BYTE 1
0 0 0 0 0 0 B9 B8
D
OUT
from LTC1091 Stored in MC68HC05C4 RAM
MSB
LOCATION A
B7 B6 B5 B4 B3 B2 B1 B0
LSB
LOCATION A + 1
BYTE 2
LTC1091
CS
CLK
D
IN
D
OUT
ANALOG
INPUTS
CO
SCK
MOSI
MISO
MC68HC05C4
LABEL MNEMONIC COMMENTS
START BCLRn Bit 0 Port C Goes Low (CS Goes Low)
LDA Load LTC1090 D
IN
Word into Acc
STA Load LTC1090 D
IN
Word into SPI from Acc
Transfer Begins
TST Test Status of SPIF
BPL Loop to Previous Instruction If Not Done
with Transfer
LDA Load contents of SPI Data Register into
Acc (D
OUT
MSBs)
STA Start Next SPI Cycle
AND Clear 6 MSBs of First D
OUT
Word
STA Store in Memory Location A (MSBs)
TST Test Status of SPIF
BPL Loop to Previous Instruction If Not Done
with Transfer
BSETn Set B0 of Port C (CS Goes High)
LDA Load contents of SPI Data Register into
Acc (D
OUT
LSBs)
STA Store in Memory location A + 1 (LSBs)