Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - ADC 10 Bit PDIP 8

LTC1091/LTC1092

LTC1093/LTC1094

I FOR ATIO

0.5mV/DIV

1µs/DIV

1091-4 F14

Figure 14. Poor Reference Settling Can Cause A/D Errors

6. Reduced Reference Operation

The minimum reference voltage of the LTC1091 is limited

to 4.5V because the V

supply and reference are internally

tied together. However, the LTC1092/LTC1093/LTC1094

can operate with reference voltages below 1V.

The effective resolution of the LTC1092/LTC1093/LTC1094

can be increased by reducing the input span of the con-

verter. The parts exhibit good linearity and gain over a wide

range of reference voltages (see typical curves of Linearity

and Full-Scale Error vs Reference Voltage). However, care

must be taken when operating at low values of V

REF

because of the reduced LSB step size and the resulting

higher accuracy requirement placed on the converter. The

following factors must be considered when operating at

low V

REF

values:

1. Offset

2. Noise

3. Conversion speed (CLK frequency)

Offset with Reduced V

REF

The offset of the LTC1092/

LTC109

4 has a larger

effect on the output code when the A/D is operated with

reduced reference voltage. The offset (which is typically a

fixed voltage) becomes a larger fraction of an LSB as the

size of the LSB is reduced. The typical curve of Unadjusted

Offset Error vs Reference Voltage shows how offset in

LSBs is related to reference voltage for a typical value of

. For example, a V

of 0.5mV which is 0.1LSB with a

5V reference becomes 0.5LSB with a 1V reference and

2.5LSBs with a 0.2V reference. If this offset is unaccept-

able, it can be corrected digitally by the receiving system

or by offsetting the “–” input to the LTC1092/

LTC109

Noise with Reduced V

REF

The total input-referred noise of the LTC1092/

LTC109

4 can be reduced to approximately 200µV peak-to-

peak using a ground plane, good bypassing, good layout

techniques and minimizing noise on the reference inputs.

This noise is insignificant with a 5V reference but will

become a larger fraction of an LSB as the size of the LSB

is reduced. The typical curve of Noise Error vs Reference

Voltage shows the LSB contribution of this 200µV of

noise.

For operation with a 5V reference, the 200µV noise is only

0.04LSB peak-to-peak. In this case, the LTC1092/

LTC109

4 noise will contribute virtually no uncertainty to

the output code. However, for reduced references, the

noise may become a significant fraction of an LSB and

cause undesirable jitter in the output code. For example,

with a 1V reference, this same 200µV noise is 0.2LSB

peak-to-peak. This will reduce the range of input voltages

over which a stable output code can be achieved by

0.2LSB. If the reference is further reduced to 200mV, the

200µV noise becomes equal to one LSB and a stable code

may be difficult to achieve. In this case averaging readings

may be necessary.

This noise data was taken in a very clean setup. Any setup-

induced noise (noise or ripple on V

, V

REF

, V

or V

–

) will

add to the internal noise. The lower the reference voltage

to be used, the more critical it becomes to have a clean,

noise-free setup.

Conversion Speed with Reduced V

REF

With reduced reference voltages, the LSB step size is

reduced and the LTC1092/

LTC109

4 internal

comparator overdrive is reduced. Therefore, it may be

necessary to reduce the maximum CLK frequency when

low values of V

REF

are used.