Datasheet

17
LTC1096/LTC1096L
LTC1098/LTC1098L
U
S
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the converter will draw current. This current may be larger
than the typical supply current. It is worthwhile to bring the
CS pin all the way to ground when it is low and all the way
to supply voltage when it is high to obtain the lowest
supply current.
When the CS pin is high (= supply voltage), the converter
is in shutdown mode and draws only leakage current. The
status of the D
IN
and CLK input have no effect on supply
current during this time. There is no need to stop D
IN
and
CLK with CS = high, except the MPU may benefit.
Minimize CS Low Time
In systems that have significant time between conver-
sions, lowest power drain will occur with the minimum CS
low time. Bringing CS low, waiting 10µs for the wake-up
time, transferring data as quickly as possible, and then
bringing it back high will result in the lowest current drain.
This minimizes the amount of time the device draws
power. Even though the device draws more power at high
clock rates, the net power is less because the device is on
for a shorter time.
D
OUT
Loading
Capacitive loading on the digital output can increase
power consumption. A 100pF capacitor on the D
OUT
pin
can more than double the 100µA supply current drain at a
500kHz clock frequency. An extra 100µA or so of current
goes into charging and discharging the load capacitor. The
same goes for digital lines driven at a high frequency by
any logic. The CxVxf currents must be evaluated and the
troublesome ones minimized.
Lower Supply Voltage
For lower supply voltages, LTC offers the LTC1096L/
LTC1098L. These pin compatible devices offer specified
performance to 2.65V
MIN
supply.
OPERATING ON OTHER THAN 5V SUPPLIES
The LTC1096 operates from 3V to 9V supplies and the
LTC1098 operates from 3V to 6V supplies. To operate the
LTC1096/LTC1098 on other than 5V supplies, a few things
must be kept in mind.
Wake-Up Time
A 10µs wake-up time must be provided for the ADCs to
convert correctly on a 5V supply. The wake-up time is
typically less than 3µs over the supply voltage range (see
typical curve of Wake-Up Time vs Supply Voltage). With
10µs wake-up time provided over the supply range, the
ADCs will have adequate time to wake up and acquire input
signals.
Input Logic Levels
The input logic levels of CS, CLK and D
IN
are made to meet
TTL on 5V supply. When the supply voltage varies, the
input logic levels also change. For the LTC1096/LTC1098
to sample and convert correctly, the digital inputs have to
meet logic low and high levels relative to the operating
supply voltage (see typical curve of Digital Input Logic
Threshold vs Supply Voltage). If achieving micropower
consumption is desirable, the digital inputs must go rail-
to-rail between supply voltage and ground (see ACHIEV-
ING MICROPOWER PERFORMANCE section).
Clock Frequency
The maximum recommended clock frequency is 500kHz
for the LTC1096/LTC1098 running off a 5V supply. With
the supply voltage changing, the maximum clock fre-
quency for the devices also changes (see the typical curve
of Maximum Clock Rate vs Supply Voltage). If the maxi-
mum clock frequency is used, care must be taken to
ensure that the device converts correctly.
Mixed Supplies
It is possible to have a microprocessor running off a 5V
supply and communicate with the LTC1096/LTC1098
operating on 3V or 9V supplies. The requirement to
achieve this is that the outputs of CS, CLK and D
IN
from the
MPU have to be able to trip the equivalent inputs of the
ADCs and the output of D
OUT
from the ADCs must be able
to toggle the equivalent input of the MPU (see typical curve
of Digital Input Logic Threshold vs Supply Voltage). With
the LTC1096 operating on a 9V supply, the output of D
OUT
may go between 0V and 9V. The 9V output may damage
the MPU running off a 5V supply. The way to get around
this possibility is to have a resistor divider on D
OUT