Datasheet

10
LTC1149
LTC1149-3.3/LTC1149-5
APPLICATIO S I FOR ATIO
WUU U
the N-channel MOSFET operating in continuous mode are
given by:
N-Ch P
D
=
V
IN
– V
OUT
V
IN
(I
MAX
)
2
(1 + ∂
N
)R
DS(ON)
N-Ch Duty Cycle =
V
IN
– V
OUT
V
IN
where ∂ is the temperature dependency of R
DS(ON)
. Note
that there is no transition loss term in the N-channel
dissipation equation because the drain-to-source voltage
is always low when the N-channel MOSFET is turning on
or off. The remaining I
2
R losses are the greatest at high
input voltage or during a short circuit, when the N-channel
duty cycle is nearly 100%. Fortunately, low R
DS(ON)
N-channel MOSFETs are readily available which reduce
losses to the point that heat sinking is not required, even
during continuous short-circuit operation.
The Schottky diode D1 shown in Figure 1 only conducts
during the dead-time between the conduction of the two
power MOSFETs. D1’s sole purpose in life is to prevent the
body diode of the N-channel MOSFET from turning on and
storing charge during the dead-time, which could cost as
much as 1% in efficiency (although there are no other
harmful effects if D1 is omitted). Therefore, D1 should be
selected for a forward voltage of less than 0.7V when
conducting I
MAX
.
Finally, both MOSFETs and D1 must be selected for
breakdown voltages higher than the maximum V
IN
.
C
IN
and C
OUT
Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle V
OUT
/V
IN
. To
prevent large voltage transients, a low ESR input capacitor
sized for the maximum RMS current must be used. The
maximum RMS capacitor current is given by:
C
IN
Required I
RMS
≈
I
MAX
[V
OUT
(V
IN
– V
OUT
)]
1/2

V
IN
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
MAX
/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet size or height requirements in the
design. An additional 0.1µF ceramic capacitor may also be
required on V
IN
for high frequency decoupling.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). The ESR of C
OUT
must be less
than twice the value of R
SENSE
for proper operation of the
LTC1149 series:
C
OUT
Required ESR < 2R
SENSE
Optimum efficiency is obtained by making the ESR equal
to R
SENSE
. As the ESR is increased up to 2R
SENSE
, the
efficiency degrades by less than 1%. If the ESR is greater
than 2R
SENSE
, the voltage ripple on the output capacitor
will prematurely trigger Burst Mode operation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent.
Manufacturers such as Nichicon, Chemicon and Sprague
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR for its size, at a somewhat
higher price. Once the ESR requirement for C
OUT
has been
met, the RMS current rating generally far exceeds the
I
RIPPLE(P-P)
requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the capacitance, ESR, or RMS
current handling requirements of the application. Alumi-
num electrolytic and dry tantalum capacitors are both
available in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalums, available
in case heights ranging from 2mm to 4mm. For example,
if 200µF/10V is called for in an application requiring 3mm
height, two AVX 100µF/10V (P/N TPSD 107K010) could be
used. Consult the manufacturer for other specific recom-
mendations.
At low supply voltages, a minimum value of C
OUT
is
suggested to prevent an abnormal low frequency operat-
ing mode (see Figure 4). When C
OUT
is too small, the