Datasheet

12
LTC1149
LTC1149-3.3/LTC1149-5
APPLICATIO S I FOR ATIO
WUU U
the ground side of the output to prevent the absolute
maximum voltage ratings of the sense pins from being
exceeded. This is shown in Figure 5. When the current
sense comparator is operating at 0V common mode, the
off-time increases approximately 40%, requiring the use
of a smaller timing capacitor C
T
.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100 – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power. (For high efficiency circuits only small
errors are incurred by expressing losses as a percentage
of output power.)
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1149 series circuits: 1) LTC1149 DC supply
current, 2) MOSFET gate charge current, 3) I
2
R losses and
4) P-channel transition losses.
1. The DC supply current is the current which flows into
V
IN
Pin 2 less the gate charge current. For V
IN
= 12V the
LTC1149 DC supply current is 0.6mA for no load, and
increases proportionally with load up to 2mA after the
LTC1149 series has entered continuous mode.
Because the DC supply current is drawn from V
IN
, the
resulting loss increases with input voltage. For
V
IN
= 24V, the DC bias losses are generally less than 3%
for load currents over 300mA. However, at very low
load currents the DC bias current accounts for nearly all
of the loss.
2. MOSFET gate charge current results from switching the
gate capacitance of the power MOSFETs. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from V
IN
to ground. The
resulting dQ/dt is a current out of V
IN
which is typically
much larger than the DC supply current. In continuous
mode, I
GATECHG
= f (Q
N
+ Q
P
). The typical gate charge
for a 0.1Ω N-channel power MOSFET is 25nC, and for
a P-channel about twice that value. This results in
I
GATECHG
= 7.5mA in 100kHz continuous operation, for
a 5% to 10% typical mid-current loss with V
IN
= 24V.
Note that the gate charge loss increases directly with
both input voltage and operating frequency. This is the
principal reason why the highest efficiency circuits
operate at moderate frequencies. Furthermore, it
argues against using larger MOSFETs than necessary
to control I
2
R losses, since overkill can cost efficiency
as well as money!
3. I
2
R losses are easily predicted from the DC resistances
of the MOSFET, inductor and current shunt. In continu-
ous mode all of the output current flows through L and
R
SENSE
, but is “chopped” between the P-channel and
N-channel MOSFETs. If the two MOSFETs have
approximately the same R
DS(ON)
, then the resistance of
one MOSFET can simply be summed with the resis-
tances of L and R
SENSE
to obtain I
2
R losses. For
example, if each R
DS(ON)
= 0.1Ω, R
L
= 0.15Ω and
R
SENSE
= 0.05Ω, then the total resistance is 0.3Ω. This
results in losses ranging from 3% to 12% as the output
current increases from 0.5A to 2A. I
2
R losses cause the
efficiency to roll-off at high output currents.
4. Transition losses apply only to the P-channel MOSFET,
and only when operating at high input voltages (typi-
cally 24V or greater). Transition losses can be esti-
mated from:
Transition Loss ≈ 5(V
IN
)
2
(I
MAX
)(C
RSS
)(f)
For example, if V
IN
= 48V, I
MAX
= 2A, C
RSS
= 300pF (a very
large MOSFET) and f = 100kHz, the transition loss is 0.7W.
A loss of this magnitude would not only kill efficiency but
would probably require additional heat sinking for the
MOSFET! See Design Example for further guidelines on
how to select the P-channel MOSFET.
Other losses including C
IN
and C
OUT
ESR dissipative
losses, Schottky conduction losses during dead-time, and
inductor core losses, generally account for less than 2%
total additional loss.