Datasheet

LTC1196/LTC1198
20
119698fb
APPLICATIONS INFORMATION
Source Resistance
The analog inputs of the LTC1196/LTC1198 look like
a 25pF capacitor (C
IN
) in series with a 120Ω resistor
(R
ON
) as shown in Figure 8. C
IN
gets switched between
the selected “+” and “–” inputs once during each con-
version cycle. Large external source resistors will slow
the settling of the inputs. It is important that the overall
RC time constants be short enough to allow the analog
inputs to completely settle within t
SMPL
.
REFERENCE INPUT
The voltage on the reference input of the LTC1196 defi nes
the voltage span of the A/D converter. The reference
input has transient capacitive switching currents which
are due to the switched-capacitor conversion technique
(see Figure 9). During each bit test of the conversion
(every CLK cycle), a capacitive current spike will be
generated on the reference pin by the ADC. These high
frequency current spikes will settle quickly and do not
cause a problem if the reference input is bypassed with
at least a 0.1μF capacitor.
The reference input can be driven with standard volt-
age references. Bypassing the reference with a 0.1μF
capacitor is recommended to keep the high frequency
impedance low as described above. Some references
require a small resistor in series with the bypass capaci-
tor for frequency stability. See the individual reference
data sheet for details.
Reduced Reference Operation
The minimum reference voltage of the LTC1198 is limited
to 2.7V because the V
CC
supply and reference are internally
tied together. However, the LTC1196 can operate with
reference voltages below 1V.
The effective resolution of the LTC1196 can be increased
by reducing the input span of the converter. The LTC1196
exhibits good linearity and gain over a wide range of
reference voltages (see the Linearity and Full-Scale Error
vs Reference Voltage curves in the Typical Performance
Characteristics section). However, care must be taken when
operating at low values of V
REF
because of the reduced
LSB step size and the resulting higher accuracy require-
ment placed on the converter. The following factors must
be considered when operating at low V
REF
values.
1. Offset
2. Noise
Offset with Reduced V
REF
The offset of the LTC1196 has a larger effect on the output
code when the ADC is operated with reduced reference
voltage. The offset (which is typically a fi xed voltage) be-
comes a larger fraction of an LSB as the size of the LSB is
reduced. The Unadjusted Offset Error vs Reference Voltage
curve in the Typical Performance Characteristics section
depicts how offset in LSBs is related to reference voltage
for a typical value of V
OS
. For example, a V
OS
of 2mV which
is 0.1LSB with a 5V reference becomes 0.5LSB with a 1V
reference and 2.5LSB with a 0.2V reference. If this offset is
unacceptable, it can be corrected digitally by the receiving
system or by offsetting the “–” input of the LTC1196.
R
ON
120Ω
C
IN
25pF
LTC1196
LTC1198
+
INPUT
V
IN
+
–
INPUT
R
SOURCE
–
R
SOURCE
+
V
IN
–
1196/98 F08
lt
SMPL
t
SMPL
n
Figure 8. Analog Input Equivalent Circuit
R
ON
5pF TO
30pF
LTC1196
REF
+
R
OUT
V
REF
EVERY CLK CYCLE
5
4
GND
1196/98 F09
Figure 9. Reference Input Equivalent Circuit