Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - system monitor Reset/power-on reset SOIC 8

LTC1232

sn1232 1232fas

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Guaranteed

Reset Assertion at V

= 1V

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8-Pin SO Plastic Package

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2.0mA Maximum Supply Current

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4.62V/4.37V Precision Voltage Monitor

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Power OK/Reset Time Delay: 600ms

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Minimum External Component Count

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Superior Upgrade for DS1232

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Critical µP Power Monitoring

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Intelligent Instruments

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Computers and Controllers

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Automotive Systems

Microprocessor

Supervisory Circuits

RST Output Voltage vs

Supply Voltage

FEATURES

APPLICATIO S

DESCRIPTIO

, LTC and LT are registered trademarks of Linear Technology Corporation.

LTC1232 • TA02

SUPPLY VOLTAGE (V)

RST OUTPUT VOLTAGE (V)

The LTC

1232 provides power supply monitoring,

watchdog timing and external reset for microprocessor

systems. A precise internal voltage reference and

comparator circuit monitor the power supply line. When

an out-of-tolerance condition occurs, the reset outputs

are forced to active states. The RST output is guaranteed

to remain logic low even with V

as low as 1V.

The LTC1232 has an internal watchdog timer which forces

the reset outputs to active states when the Strobe input is

not forced low prior to a preset time-out period. The

watchdog timing can be set to operate on time-out periods

of typically 150ms, 600ms or 1.2 seconds.

The LTC1232 performs push-button reset control.

The LTC1232 debounces the push-button input

and guarantees an active reset pulse width of 250ms

minimum.

TYPICAL APPLICATIO

100k

5V DC

I/O LINE

MPU

(e.g. 6805)

RESET

LTC1232 • TA01

LTC1232

PB RST

TOL

GND

RST

Summary of content (8 pages)

PAGE 1
LTC1232 Microprocessor Supervisory Circuits U FEATURES ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®1232 provides power supply monitoring, watchdog timing and external reset for microprocessor systems. A precise internal voltage reference and comparator circuit monitor the power supply line. When an out-of-tolerance condition occurs, the reset outputs are forced to active states. The RST output is guaranteed to remain logic low even with VCC as low as 1V.
PAGE 2
LTC1232 W W W AXI U U U W PACKAGE/ORDER I FOR ATIO U ABSOLUTE RATI GS (Note 1, 2 and 3) Terminal Voltage VCC ....................................................... –0.3V to 7.0V ST and RST .......................................... –0.3V to 7.0V All Other Inputs and Outputs ...... –0.3V to VCC +0.3V Power Dissipation .............................................. 500mW Operating Temperature Range LTC1232C ............................................... 0°C to 70°C LTC1232I ........................
PAGE 3
LTC1232 U U U U WW RECO E DED OPERATI G CO DITIO S The ● denotes the specifications which apply over the full operating temperature. VCC = full operating range. SYMBOL PARAMETER VCC Supply Voltage VIH VIL CONDITIONS MIN TYP MAX UNITS ● 4.5 5 5.5 V ST and PB RST Input High Level ● 2 VCC +0.3 V ST and PB RST Input Low Level ● –0.3 0.8 V DC ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature. VCC = full operating range.
PAGE 4
LTC1232 WU W TI I G DIAGRA S Push-Button Reset PB RST Power Down tF VIH VIL tPB VCC tRST RST 4.50V tRPD VIH VIL RST 4.75V 4.25V RST LTC1232 • TD01 VOH VOL RST LTC1232 • TD03 Strobe Input Power Up tR tST VCC 4.50V 4.75V 4.25V tRPU tTD LTC1232 • TD02 RST VOH VOL RST LTC1232 • TD04 W BLOCK DIAGRA VCC 8 TOL 3 6 RST 5 RST + 5%, 10% SWITCH RESET PULSE GENERATOR C1 – 1.
PAGE 5
LTC1232 U W TYPICAL PERFOR A CE CHARACTERISTICS VCC Trip Point vs Temperature VCC Trip Point vs Temperature 4.63 VCC = 5V TOL = VCC TOL = GND 672 4.61 4.60 4.59 4.58 RESET ACTIVE TIME (ms) 4.37 VCC TRIP POINT (V) 4.62 VCC TRIP POINT (V) Reset Active Time vs Temperature 696 4.38 4.36 4.35 4.34 50 25 75 0 TEMPERATURE (˚C) 100 125 4.
PAGE 6
LTC1232 U U U PI FU CTIO S active low for a minimum of 250ms from the moment the push-button reset input is released from logic low level. RST: Open Drain Logic Output for µP Reset Control. The LTC1232 provides three ways to generate µP reset. First, when VCC falls below VCC trip point (4.75V with TOL = GND and 4.5V with TOL = VCC), RST goes active low. After VCC returns to 5V, the reset pulse generator forces RST to remain active low for a minimum of 250ms.
PAGE 7
LTC1232 U W U U APPLICATIO S I FOR ATIO condition is satisfied, the reset pulse generator forces the reset outputs to active states. The reset signals will remain active for a minimum of 250ms from the moment the push-button reset input is released from logic low level (see Timing Diagram).
PAGE 8
LTC1232 U PACKAGE DESCRIPTIO S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 7 6 5 N N .245 MIN .160 ±.005 1 .030 ±.005 TYP .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) 2 3 N/2 N/2 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 1 2 .053 – .069 (1.346 – 1.752) 0°– 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN .