Datasheet

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LTC1391

sn1391 1391fas

8-Channel

Analog Multiplexer with

Cascadable Serial Interface

■

Low R

: 45Ω

■

Single 2.7V to ±5V Supply Operation

■

Low Charge Injection

■

Serial Digital Interface

■

Analog Inputs May Extend to Supply Rails

■

Low Leakage: ±5nA Max

■

Guaranteed Break-Before-Make

■

TTL/CMOS Compatible for All Digital Inputs

■

Cascadable to Allow Additional Channels

■

Can Be Used as a Demultiplexer

The LTC

1391 is a high performance CMOS 8-to-1 analog

multiplexer. It features a serial digital interface that allows

several LTC1391s to be daisy-chained together, increas-

ing the number of MUX channels available using a single

digital port.

The LTC1391 features a typical R

of 45Ω, a typical

switch leakage of 50pA and guaranteed break-before-

make operation. Charge injection is ±10pC maximum. All

digital inputs are TTL and CMOS compatible when oper-

ated from single or dual supplies. The inputs can with-

stand 100mA fault current.

The LTC1391 is available in 16-pin PDIP, SSOP and

narrow SO packages. For applications requiring 2-way

serial data transmission, see the LTC1390 data sheet.

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Data Acquisition Systems

■

Communication Systems

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Signal Multiplexing/Demultiplexing

, LTC and LT are registered trademarks of Linear Technology Corporation.

–

OUT

CLK

GND

ANALOG

INPUTS

LTC1391

CLK

OUT

CS/SHDN

REF

+IN

–IN

GND

LTC1285

0.1µF

OPTIONAL A/D

INPUT FILTER

1µF

DATA IN

CLK

DATA OUT

SERIAL INTERFACE

TO MUX AND ADC

1391 TA01

ANALOG INPUT VOLTAGE (V)

–5 –4 –2 0 2 4

ON-RESISTANCE (Ω)

300

250

200

150

100

–3 –1 1 3

1391 TA02

= 25°C

= 2.7V

–

= 0V

= 5V

–

= –5V

On-Resistance vs

Analog Input Voltage

3V, 8-Channel 12-Bit ADC

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

Summary of content (12 pages)

PAGE 1
LTC1391 8-Channel Analog Multiplexer with Cascadable Serial Interface U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC ® 1391 is a high performance CMOS 8-to-1 analog multiplexer. It features a serial digital interface that allows several LTC1391s to be daisy-chained together, increasing the number of MUX channels available using a single digital port. Low RON: 45Ω Single 2.
PAGE 2
LTC1391 W W W (Note 1) AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO Total Supply Voltage (V + to V –) .............................. 15V Input Voltage Analog Inputs/Outputs ..... (V – – 0.3V) to (V + + 0.3V) Digital Inputs .........................................– 0.3V to 15V Digital Outputs ..........................– 0.3V to (V + + 0.3V) Power Dissipation .............................................. 500mW Operating Temperature Range LTC1391C .........................................
PAGE 3
LTC1391 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 5V, V – = – 5V, GND = 0V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Dynamic fCLK Clock Frequency (Note 2) 5 tON Enable Turn-On Time VS = 2.5V, RL = 1k, CL = 35pF 260 400 ns tOFF Enable Turn-Off Time VS = 2.
PAGE 4
LTC1391 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 2.7V, V – = GND = 0V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Dynamic fCLK Clock Frequency (Note 2) 5 tON Enable Turn-On Time VS = 1.5V, RL = 1k, CL = 35pF (Note 4) 490 800 ns tOFF Enable Turn-Off Time VS = 1.
PAGE 5
LTC1391 U W TYPICAL PERFOR A CE CHARACTERISTICS Driver Output High Voltage vs Temperature Driver Output High Voltage vs Output Current 5.0 0 4.0 –1.0 –1.5 V + = 5V V – = –5V –2.0 –2.5 –3.0 3.5 3.0 2.5 V + = 2.7V V – = 0V IO = 400µA 2.0 1.5 1.0 –3.5 –4.0 2.0 V + = 5V V – = –5V IO = 1.6mA 4.5 V + = 2.7V V – = 0V OUTPUT VOLTAGE (V) OUTPUT CURRENT (mA) –0.5 0.5 TA =25°C 2.5 3.0 3.5 4.0 OUTPUT VOLTAGE (V) 4.5 5.
PAGE 6
LTC1391 U U W U APPLICATIONS INFORMATION Multiplexer Operation Figure 1 shows the block diagram of the components within the LTC1391 required for MUX operation. The LTC1391 uses DIN to select the active channel and the chip select input, CS, to switch on the selected channel as shown in Figure 2. When CS is high, the input data on the DIN pin is latched into the 4-bit shift register on the rising clock edge. The input data consists of the “EN” bit and a string of three bits for channel selection.
PAGE 7
LTC1391 U U W U APPLICATIONS INFORMATION bits clocked into the LTC1391 shift register before CS is taken low select the MUX channel that is turned on. This allows a series of devices, with the DOUT of one device connected to the DIN of the next device, to be programmed with a single data stream. CLK DIN 1 D1 2 D2 3 D3 4 D4 DOUT D5 D1 D2 D3 D4 D5 To ensure that only one channel is switched on at any one time, two sets of channel selection bits are needed for DATA as shown in Figure 6.
PAGE 8
LTC1391 U TYPICAL APPLICATIONS Daisy-Chaining Five LTC1391s 5V 0.1µF BYPASS CAPACITORS FROM V + TO GND FOR EACH LTC1391 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 S0 V+ S1 D S2 S3 S4 S5 S6 S7 V+ S1 D S3 S4 S5 S6 S7 V+ S1 D S3 S4 S5 S6 S7 V+ S1 D S3 S4 S5 S6 S7 S1 D S4 S5 S6 S7 7 CLK LTC1286 3 6 –IN DOUT 4 5 GND CS 0.
PAGE 9
LTC1391 U PACKAGE DESCRIPTIO GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) 0.189 – 0.196* (4.801 – 4.978) 16 15 14 13 12 11 10 9 0.229 – 0.244 (5.817 – 6.198) 0.150 – 0.157** (3.810 – 3.988) 1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0.007 – 0.0098 (0.178 – 0.249) 0.009 (0.229) REF 0.053 – 0.068 (1.351 – 1.727) 2 3 4 5 6 7 8 0.004 – 0.0098 (0.102 – 0.249) 0° – 8° TYP 0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH.
PAGE 10
LTC1391 U PACKAGE DESCRIPTIO N Package 16-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) 0.770* (19.558) MAX 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 0.255 ± 0.015* (6.477 ± 0.381) 0.130 ± 0.005 (3.302 ± 0.127) 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) ( +0.035 0.325 –0.015 8.255 +0.889 –0.381 ) 0.045 – 0.065 (1.143 – 1.651) 0.020 (0.508) MIN 0.065 (1.651) TYP 0.125 (3.175) MIN 0.100 (2.
PAGE 11
LTC1391 U PACKAGE DESCRIPTIO S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) 0.386 – 0.394* (9.804 – 10.008) 16 15 14 13 12 11 10 9 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 2 3 4 5 6 0.053 – 0.069 (1.346 – 1.752) 0.008 – 0.010 (0.203 – 0.254) 0.014 – 0.019 (0.355 – 0.483) TYP 8 0.004 – 0.010 (0.101 – 0.254) 0° – 8° TYP 0.016 – 0.050 (0.406 – 1.270) 7 0.050 (1.
PAGE 12
LTC1391 U TYPICAL APPLICATIO Interfacing LTC1391 with LTC1257 for Demultiplex Operation 1 2 3 ANALOG OUTPUTS 4 5 6 7 8 V+ S0 S1 D V S3 DOUT S4 DIN S5 CS S6 CLK S7 TTL COMPATIBLE AT V + = 5V GND 5V ≤ V + ≤ 12V 15 – 14 S2 LTC1391 16 0.1µF 47k 13 12 OPTIONAL D/A OUTPUT FILTER 11 10 1 9 2 DATA CLK CS CLK VCC 8 7 VOUT LTC1257 6 3 LOAD VREF 5 4 GND DOUT DIN 0.