Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal MSOP 10 EP

LTC1407/LTC1407A

1407fb

BLOCK DIAGRAM

DESCRIPTION

Serial 12-Bit/14-Bit, 3Msps

Simultaneous Sampling

ADCs with Shutdown

The LTC

1407/LTC1407A are 12-bit/14-bit, 3Msps ADCs

with two 1.5Msps simultaneously sampled differential

inputs. The devices draw only 4.7mA from a single 3V

supply and come in a tiny 10-lead MS package. A Sleep

shutdown feature lowers power consumption to 10µW.

The combination of speed, low power and tiny package

makes the LTC1407/LTC1407A suitable for high speed,

portable applications.

The LTC1407/LTC1407A contain two separate differential

inputs that are sampled simultaneously on the rising edge

of the CONV signal. These two sampled inputs are then

converted at a rate of 1.5Msps per channel.

The 80dB common mode rejection allows users to eliminate

ground loops and common mode noise by measuring

signals differentially from the source.

The devices convert 0V to 2.5V unipolar inputs differentially.

The absolute voltage swing for CH0

, CH0

–

, CH1

and

CH1

–

extends from ground to the supply voltage.

The serial interface sends out the two conversion results in 32

clocks for compatibility with standard serial interfaces.

THD, 2nd and 3rd

vs Input Frequency

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 6084440, 6522187.

FEATURES

APPLICATIONS

3Msps Sampling ADC with Two Simultaneous

Differential Inputs

1.5Msps Throughput per Channel

Low Power Dissipation: 14mW (Typ)

3V Single Supply Operation

2.5V Internal Bandgap Reference with External

Overdrive

3-Wire Serial Interface

Sleep (10µW) Shutdown Mode

Nap (3mW) Shutdown Mode

80dB Common Mode Rejection at 100kHz

0V to 2.5V Unipolar Input Range

Tiny 10-Lead MS Package

Telecommunications

Data Acquisition Systems

Uninterrupted Power Supplies

Multiphase Motor Control

I and Q Demodulation

Industrial Control

–

S AND H

–

S AND H

GND

EXPOSED PAD

REF

10µF

CH0

–

CH0

CH1

–

CH1

3V10µF

LTC1407A

THREE-

STATE

SERIAL

OUTPUT

PORT

MUX

2.5V

REFERENCE

TIMING

LOGIC

SDO

CONV

SCK

1407A BD

3Msps

14-BIT ADC

14-BIT LATCH14-BIT LATCH

FREQUENCY (MHz)

0.1

–80

THD, 2nd, 3rd (dB)

–74

–68

–62

–56

1 10 100

1407 G02

–86

–92

–98

–104

–50

–44

THD

3rd

2nd

Summary of content (24 pages)

PAGE 1
LTC1407/LTC1407A Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown FEATURES DESCRIPTION n The LTC®1407/LTC1407A are 12-bit/14-bit, 3Msps ADCs with two 1.5Msps simultaneously sampled differential inputs. The devices draw only 4.7mA from a single 3V supply and come in a tiny 10-lead MS package. A Sleep shutdown feature lowers power consumption to 10μW. The combination of speed, low power and tiny package makes the LTC1407/LTC1407A suitable for high speed, portable applications.
PAGE 2
LTC1407/LTC1407A ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) Supply Voltage (VDD) .................................................4V Analog Input Voltage (Note 3) ..... –0.3V to (VDD + 0.3V) Digital Input Voltage .................... –0.3V to (VDD + 0.3V) Digital Output Voltage ................. –0.3V to (VDD + 0.3V) Power Dissipation ...............................................100mW Operation Temperature Range LTC1407C/LTC1407AC .............................
PAGE 3
LTC1407/LTC1407A ANALOG INPUT The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. With internal reference, VDD = 3V. SYMBOL PARAMETER CONDITIONS VIN Analog Differential Input Range (Notes 3, 9) VCM Analog Common Mode + Differential Input Range (Note 10) IIN Analog Input Leakage Current CIN Analog Input Capacitance tACQ Sample-and-Hold Acquisition Time tAP Sample-and-Hold Aperture Delay Time tJITTER MIN 2.
PAGE 4
LTC1407/LTC1407A DIGITAL INPUTS AND DIGITAL OUTPUTS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VDD = 3V. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIH High Level Input Voltage VDD = 3.3V l VIL Low Level Input Voltage VDD = 2.7V l 0.
PAGE 5
LTC1407/LTC1407A TIMING CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VDD = 3V.
PAGE 6
LTC1407/LTC1407A TYPICAL PERFORMANCE CHARACTERISTICS 98kHz Sine Wave 4096 Point FFT Plot SNR vs Input Frequency 74 0 MAGNITUDE (dB) 68 SNR (dB) 65 62 59 1 10 FREQUENCY (MHz) 100 –20 –20 –30 –30 –40 –40 –50 –60 –70 –80 –90 –110 –110 –120 –120 0 100 200 300 400 500 FREQUENCY (kHz) 600 –40 –50 –60 –70 –80 –90 –100 –110 100 200 300 400 500 FREQUENCY (kHz) 600 700 1.0 2.0 1.6 0.6 1.2 0.4 0.2 0 –0.2 –0.4 –0.6 0 –0.4 –0.8 –1.2 –1.6 –2.
PAGE 7
LTC1407/LTC1407A TYPICAL PERFORMANCE CHARACTERISTICS VDD = 3V, TA = 25°C (LTC1407/LTC1407A) Full-Scale Signal Frequency Response CMRR vs Frequency 12 Crosstalk vs Frequency –20 0 6 –30 –20 CROSSTALK (dB) –40 –40 CMRR (dB) –6 –12 –18 –60 CH0 CH1 –80 –100 –30 –36 1M 10M 100M FREQUENCY (Hz) 1k 10k 100k 1M FREQUENCY (Hz) 10M 1407 G07 CH1 TO CH0 CH0 TO CH1 100M –90 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 1407 G09 1407 G08 Simultaneous Input Steps at CH0 and CH1 from 25Ω PSSR vs Frequenc
PAGE 8
LTC1407/LTC1407A PIN FUNCTIONS CH0+ (Pin 1): Noninverting Channel 0. CH0+ operates fully differentially with respect to CH0– with a 0V to 2.5V differential swing and a 0 to VDD absolute input range. CH0– (Pin 2): Inverting Channel 0. CH0– operates fully differentially with respect to CH0+ with a –2.5V to 0V differential swing and a 0 to VDD absolute input range. VREF (Pin 3): 2.5V Internal Reference.
PAGE 9
SDO INTERNAL S/H STATUS CONV SCK SDO INTERNAL S/H STATUS CONV SCK t6 t4 34 t6 t4 34 SAMPLE 33 SAMPLE 33 Hi-Z t3 t8 2 3 D11 4 6 HOLD 7 1 Hi-Z t3 2 t8 t2 3 D13 4 8 t1 9 t10 10 11 12 13 14 15 D10 D9 D8 6 HOLD 7 8 t1 D6 D4 9 t10 10 11 12-BIT DATA WORD D5 D3 12 D2 13 D0 D12 D11 D10 D9 D8 D6 14-BIT DATA WORD D7 D5 D4 X* X* 17 19 14 15 D3 D2 D1 t9 16 D0 17 19 21 22 HOLD 23 24 25 26 27 28 29 30 t8 20 D10 21 D9
PAGE 10
LTC1407/LTC1407A TIMING DIAGRAMS Nap Mode Waveforms SCK t1 CONV NAP Sleeep Mode Waveforms SCK t1 t1 CONV NAP SLEEP t12 VREF 1407 TD02 NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS SCK to SDO Delay SCK VIH SCK VIH t8 t10 SDO t9 VOH 90% SDO 10% VOL 1407 TD03 1407fb 10
PAGE 11
LTC1407/LTC1407A APPLICATIONS INFORMATION DRIVING THE ANALOG INPUT The differential analog inputs of the LTC1407/LTC1407A are easy to drive. The inputs may be driven differentially or as a single-ended input (i.e., the CH0– input is grounded). All four analog inputs of both differential analog input pairs, CH0+ with CH0– and CH1+ with CH1–, are sampled at the same instant.
PAGE 12
LTC1407/LTC1407A APPLICATIONS INFORMATION LT1818/LT1819: 400MHz, 2500V/μs, 9mA, Single/Dual Voltage Mode Operational Ampliﬁer. inputs to minimize noise. A simple 1-pole RC ﬁlter is sufﬁcient for many applications. For example, Figure 1 shows a 47pF capacitor from CHO+ to ground and a 51Ω source resistor to limit the net input bandwidth to 30MHz. The 47pF capacitor also acts as a charge reservoir for the input sample-and-hold and isolates the ADC input from sampling-glitch sensitive circuitry.
PAGE 13
LTC1407/LTC1407A APPLICATIONS INFORMATION INPUT RANGE The analog inputs of the LTC1407/LTC1407A may be driven fully differentially with a single supply. Either input may swing up to 3V, provided the differential swing is no greater than 2.5V. In the valid input range, the noninverting input of each channel should always be more positive than the inverting input of each channel. The 0V to 2.5V range is also ideally suited for single-ended input use with single supply applications.
PAGE 14
LTC1407/LTC1407A APPLICATIONS INFORMATION Integral nonlinearity errors (INL) and differential nonlinearity errors (DNL) are largely independent of the common mode voltage. However, the offset error will vary. CMRR is typically better than 60dB. Figure 4 shows the ideal input/output characteristics for the LTC1407/LTC1407A. The code transitions occur midway between successive integer LSB values (i.e., 0.5LSB, 1.5LSB, 2.5LSB, FS – 1.5LSB). The output code is natural binary with 1LSB = 2.
PAGE 15
LTC1407/LTC1407A APPLICATIONS INFORMATION Figure 5. Recommended Layout POWER-DOWN MODES Upon power-up, the LTC1407/LTC1407A are initialized to the active state and are ready for conversion. The Nap and Sleep mode waveforms show the power-down modes for the LTC1407/LTC1407A. The SCK and CONV inputs control the power-down modes (see Timing Diagrams). Two rising edges at CONV, without any intervening rising edges at SCK, put the LTC1407/LTC1407A in Nap mode and the power drain drops from 14mW to 6mW.
PAGE 16
LTC1407/LTC1407A APPLICATIONS INFORMATION DIGITAL INTERFACE The LTC1407/LTC1407A have a 3-wire SPI (Serial Protocol Interface) interface. The SCK and CONV inputs and SDO output implement this interface. The SCK and CONV inputs accept swings from 3V logic and are TTL compatible, if the logic swing does not exceed VDD.
PAGE 17
LTC1407/LTC1407A APPLICATIONS INFORMATION HARDWARE INTERFACE TO TMS320C54x The LTC1407/LTC1407A are serial output ADCs whose interface has been designed for high speed buffered serial ports in fast digital signal processors (DSPs). Figure 6 shows an example of this interface using a TMS320C54X. The buffered serial port in the TMS320C54x has direct access to a 2kB segment of memory.
PAGE 18
LTC1407/LTC1407A APPLICATIONS INFORMATION ; ; ; ; ; ; ; ; ; ; ; ; ; 08-21-03 ****************************************************************** Files: 1407ASIAB.ASM -> 1407A Sine wave collection with Serial Port interface both channels collected in sequence in the same 2k record bvectors.asm buffered mode. s2k14ini.asm 2k buffer size. unipolar mode Works 16 or 64 clock frames.
PAGE 19
LTC1407/LTC1407A APPLICATIONS INFORMATION ; ———————mask and shift input data —————————————— bufull: b = *ar3+ << -0 b = #07FFFh & b *ar2+ = data(#0bh) TC = (@ar2 == #02000h) if (TC) goto start goto bufull ; bsend ; ; ; ; ; ; ; load acc b with BSP buffer and shift right -0 mask out the TRISTATE bits with #03FFFh store B to out buffer and advance AR2 pointer output buffer is 2k starting at 1800h restart if out buffer is at 1fffh —————————dummy bsend return———————————— return_enable ;this is also a dummy
PAGE 20
LTC1407/LTC1407A APPLICATIONS INFORMATION .title “Vector Table” .mmregs reset nmi trap2 int0 int1 int2 tint brint bxint trint txint int3 hpiint goto #80h nop nop return_enable nop nop nop goto #88h nop nop .
PAGE 21
LTC1407/LTC1407A APPLICATIONS INFORMATION .space 24*16 ;68-7F; reserved area ********************************************************************** * (C) COPYRIGHT TEXAS INSTRUMENTS, INC. 1996 * ********************************************************************** * * * File: BSPI1407A.
PAGE 22
LTC1407/LTC1407A APPLICATIONS INFORMATION * 2’ cable from counter to CLK at DUT *No right shift is needed to right justify the input data in the main program * *the two msbs should also be masked * ******************************************************************************************* * Loopback .set NO ;(digital looback mode?) DLB bit Format .set BIT_16 ;(Data format? 16,12,10,8) FO bit IntSync .set NO ;(internal Frame syncs generated?) TXM bit IntCLK .
PAGE 23
LTC1407/LTC1407A PACKAGE DESCRIPTION MSE Package 10-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1664 Rev C) BOTTOM VIEW OF EXPOSED PAD OPTION 2.794 p 0.102 (.110 p .004) 5.23 (.206) MIN 0.889 p 0.127 (.035 p .005) 1 0.05 REF 10 DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 3.00 p 0.102 (.118 p .004) (NOTE 3) 10 9 8 7 6 DETAIL “A” 0o – 6o TYP 1 2 3 4 5 GAUGE PLANE 0.53 p 0.152 (.021 p .006) DETAIL “A” 0.18 (.007) 0.
PAGE 24
LTC1407/LTC1407A TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LTC1608 16-Bit, 500ksps Parallel ADC ±5V Supply, ±2.5V Span, 90dB SINAD LTC1609 16-Bit, 250ksps Serial ADC 5V Conﬁgurable Bipolar/Unipolar Inputs ADCs LTC1403/LTC1403A 12-/14-Bit, 2.8Msps Serial ADC 3V, 15mW, MSOP Package LTC1411 14-Bit, 2.