Datasheet

LTC1407/LTC1407A
9
1407fb
TIMING DIAGRAMS
SCK
CONV
INTERNAL
S/H STATUS
SDO
*BITS MARKED “X” AFTER D0 SHOULD BE IGNORED
t
7
t
3
t
1
13433 2 3 4 5 6 7 8 9 10 11 12 13
14
15 16 17 18 19 2120 22 23 24 25 26 27 28 29 30
31
32 33 34 1
t
2
t
6
t
8
t
10
t
9
t
9
t
8
t
4
t
5
t
8
SAMPLE HOLD HOLD HOLD
Hi-Z
Hi-Z
Hi-Z
t
CONV
12-BIT DATA WORD 12-BIT DATA WORD
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION AT CH1
t
THROUGHPUT
1407A TD01
D11 D10 D8 D7 D6 D5 D4 D3 D2 D1 D0 X* X*D9 D11 D10 D8 D7 D6 D5 D4 D3 D2 D1 D0 X* X*D9
SAMPLE
t
ACQ
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION AT CH0
SCK
CONV
INTERNAL
S/H STATUS
SDO
t
7
t
3
t
1
13433 2 3 4 5 6 7 8 9 10 11 12 13
14
15 16 17 18 19 2120 22 23 24 25 26 27 28 29 30
31
32 33 34 1
t
2
t
6
t
8
t
10
t
9
t
9
t
8
t
4
t
5
t
8
SAMPLE HOLD HOLD HOLD
Hi-Z
Hi-Z
Hi-Z
t
CONV
14-BIT DATA WORD 14-BIT DATA WORD
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION AT CH1
t
THROUGHPUT
1407A TD01
D13 D12 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0D11 D13 D12 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0D11
SAMPLE
t
ACQ
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION AT CH0
LTC1407 Timing Diagram
LTC1407A Timing Diagram