Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SOIC 28

LTC1410

12-Bit, 1.25Msps Sampling

A/D Converter with Shutdown

ESCRIPTIO

The LTC

1410 is a 0.65µs, 1.25Msps, 12-bit sampling

A/D converter that draws only 160mW from ±5V supplies.

This easy-to-use device includes a high dynamic range

sample-and-hold, a precision reference and requires no

external components. Two digitally selectable power shut-

down modes provide flexibility for low power systems.

The LTC1410’s full-scale input range is ±2.5V. Maximum

DC specifications include ±1LSB INL and ±1LSB DNL over

temperature. Outstanding AC performance includes 71dB

S/(N + D) and 82dB THD at the Nyquist input frequency of

625kHz.

The unique differential input sample-and-hold can acquire

single-ended or differential input signals up to its 20MHz

bandwidth. The 60dB common mode rejection allows

users to eliminate ground loops and common mode noise

by measuring signals differentially from the source.

The ADC has a µP compatible, 12-bit parallel output port.

There is no pipeline delay in the conversion results. A

separate convert start input and a data ready signal (BUSY)

ease connections to FIFOs, DSPs and microprocessors.

■

1.25Msps Sample Rate

■

Power Dissipation: 160mW

■

71dB S/(N + D) and 82dB THD at Nyquist

■

No Pipeline Delay

■

Nap (7mW) and Sleep (10µW) Shutdown Modes

■

Operates with Internal 15ppm/°C Reference

or External Reference

■

True Differential Inputs Reject Common Mode Noise

■

20MHz Full Power Bandwidth Sampling

■

±2.5V Bipolar Input Range

■

28-Pin SO Wide Package

■

Telecommunications

■

Digital Signal Processing

■

Multiplexed Data Acquisition Systems

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High Speed Data Acquisition

■

Spectrum Analysis

■

Imaging Systems

, LTC and LT are registered trademarks of Linear Technology Corporation.

ITY

Complete 1.25MHz, 12-Bit Sampling A/D Converter

Effective Bits and Signal-to-(Noise + Distortion)

vs Input Frequency

INPUT FREQUENCY (Hz)

EFFECTIVE BITS

S/(N + D) (dB)

10k 100k 1M 10M

LTC1410 • TA02

12 74

SAMPLE

= 1.25MHz

NYQUIST

LTC1410

0.1µF

10µF

DIFFERENTIAL

ANALOG INPUT

(–2.5V TO 2.5V)

2.50V

REF

OUTPUT

10µF

0.1µF

–5V

12-BIT

PARALLEL

BUS

µP CONTROL

LINES

1410 TA01

–A

REF

REFCOMP

AGND

D11(MSB)

D10

DGND

BUSY

CONVST

SHDN

NAP/SLP

OGND

Summary of content (16 pages)

PAGE 1
LTC1410 12-Bit, 1.25Msps Sampling A/D Converter with Shutdown U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC®1410 is a 0.65µs, 1.25Msps, 12-bit sampling A/D converter that draws only 160mW from ±5V supplies. This easy-to-use device includes a high dynamic range sample-and-hold, a precision reference and requires no external components. Two digitally selectable power shutdown modes provide flexibility for low power systems. 1.
PAGE 2
LTC1410 U U RATI GS W W W W AXI U PACKAGE/ORDER I FOR ATIO AVDD = DVDD = VDD (Notes 1, 2) ORDER PART NUMBER TOP VIEW Supply Voltage (VDD) ................................................ 6V Negative Supply Voltage (VSS) ............................... – 6V Total Supply Voltage (VDD to VSS) .......................... 12V Analog Input Voltage (Note 3) .................................. VSS – 0.3V to VDD + 0.3V Digital Input Voltage (Note 4) ............ VSS – 0.3V to 10V Digital Output Voltage ....
PAGE 3
LTC1410 W U DY A IC ACCURACY The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
PAGE 4
LTC1410 W U POWER REQUIRE E TS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PD PARAMETER Power Dissipation Nap Mode Sleep Mode CONDITIONS MIN SHDN = 0V, NAP/SLP = 5V SHDN = 0V, NAP/SLP = 0V TYP 160 7.5 0.01 MAX 230 12 1 UNITS mW mW mW WU TI I G CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
PAGE 5
LTC1410 U W TYPICAL PERFORMANCE CHARACTERISTICS S/(N + D) vs Input Frequency and Amplitude Signal-to-Noise Ratio vs Input Frequency 80 70 SIGNAL-TO-NOISE RATIO (dB) VIN = 0dB 60 VIN = –20dB 50 40 30 20 AMPLITUDE (dB BELOW THE FUNDAMENTAL) 70 SIGNAL/(NOISE + DISTORTION) (dB) Distortion vs Input Frequency 80 VIN = –60dB 10 60 50 40 30 20 10 fSAMPLE = 1.
PAGE 6
LTC1410 U U U PI FU CTIO S + AIN (Pin 1): Positive Analog Input, ±2.5V. – AIN (Pin 2): Negative Analog Input, ±2.5V. VREF (Pin 3): 2.50V Reference Output. REFCOMP (Pin 4): 4.06V Reference Bypass Pin. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic. AGND (Pin 5): Analog Ground. D11 to D4 (Pins 6 to 13): Three-State Data Outputs. DGND (Pin 14): Digital Ground for Internal Logic. Tie to AGND. D3 to D0 (Pins 15 to 18): Three-State Data Outputs. OGND (Pin 19): Digital Ground for Output Drivers.
PAGE 7
LTC1410 TEST CIRCUITS Load Circuits for Output Float Delay Load Circuits for Access Timing 5V 5V 1k 1k DBN DBN DBN 1k CL 1k CL (A) Hi-Z TO VOH AND VOL TO VOH DBN 100pF 100pF (A) VOH TO Hi-Z (B) Hi-Z TO VOL AND VOH TO VOL (B) VOL TO Hi-Z 1410 TC02 1410 TC01 U W U U APPLICATIONS INFORMATION CONVERSION DETAILS The LTC1410 uses a successive approximation algorithm and an internal sample-and-hold circuit to convert an analog signal to a 12-bit parallel output.
PAGE 8
LTC1410 U W U U APPLICATIONS INFORMATION DYNAMIC PERFORMANCE The LTC1410 has excellent high speed sampling capability. Fast Four Transform (FFT) test techniques are used to test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using an FFT algorithm, the ADC’s spectral content can be examined for frequencies outside the fundamental. 0 fSAMPLE = 1.25MHz fIN = 100.098kHz SFDR = 90.1dB SINAD = 72.
PAGE 9
LTC1410 U U W U APPLICATIONS INFORMATION 0 0 (fa) (fb) fSAMPLE = 1.25MHz fIN1 = 88.19580078kHz fIN2 = 111.9995117kHz –20 AMPLITUDE (dB) AMPLITUDE (dB BELOW THE FUNDAMENTAL) where V1 is the RMS amplitude of the fundamental frequency and V2 through Vn are the amplitudes of the second through nth harmonics. THD vs Input Frequency is shown in Figure 4. The LTC1410 has good distortion performance up to the Nyquist frequency and beyond.
PAGE 10
LTC1410 U W U U APPLICATIONS INFORMATION capacitors at the end of conversion. During conversion the analog inputs draw only a small leakage current. If the source impedance of the driving circuit is low then the LTC1410 inputs can be driven directly. As source impedance increases so will acquisition time (see Figure 6). For minimum acquisition time with high source impedance, a buffer amplifier should be used.
PAGE 11
LTC1410 U U W U APPLICATIONS INFORMATION applied to AIN and R2 is adjusted until the output code flickers between 0111 1111 1110 and 0111 1111 1111. 011...111 BIPOLAR ZERO 011...110 OUTPUT CODE easily overdriven in applications where an external reference is required. The reference amplifier provides buffering between the internal reference and the capacitive DAC. The reference amplifier compensation pin REFCOMP (Pin 4), must be bypassed with a capacitor to ground.
PAGE 12
LTC1410 U U W U APPLICATIONS INFORMATION ADC data outputs and control signals are connected to a continuously active microprocessor bus, it is possible to get errors in the conversion results. These errors are due to feedthrough from the microprocessor to the successive approximation comparator. The problem can be eliminated by forcing the microprocessor into a wait state during conversion or by using three-state buffers to isolate the ADC data bus.
PAGE 13
LTC1410 U W U U APPLICATIONS INFORMATION Power Shutdown Timing and Control The LTC1410 provides two power shutdown modes, Nap and Sleep, to save power during inactive periods. The Nap mode reduces the power by 95% and leaves only the digital logic and reference powered up. The wake-up time from Nap to active is 200ns. In Sleep mode all bias currents are shut down and only leakage current remains –– about 1µA.
PAGE 14
LTC1410 U U W U APPLICATIONS INFORMATION t CONV CS = RD = 0 t5 CONVST t6 t8 BUSY t7 DATA N DB11 TO DB0 DATA (N – 1) DB11 TO DB0 DATA DATA (N + 1) DB11 TO DB0 1410 F14 Figure 14. Mode 1a. CONVST Starts a Conversion. Data Outputs Always Enabled (CONVST = ) tCONV CS = RD = 0 t8 t5 t13 CONVST t6 t6 BUSY t7 DATA DATA (N – 1) DB11 TO DB0 DATA N DB11 TO DB0 DATA (N + 1) DB11 TO DB0 1410 F15 Figure 15. Mode 1b. CONVST Starts a Conversion.
PAGE 15
LTC1410 W U U UO APPLICATI S I FOR ATIO t8 t CONV RD = CONVST t6 t 11 BUSY t 10 t7 DATA (N – 1) DB11 TO DB0 DATA DATA N DB11 TO DB0 DATA N DB11 TO DB0 DATA (N + 1) DB11-DB0 1410 F17 Figure 17. Slow Memory Mode Timing t CONV t8 RD = CONVST t6 t 11 BUSY t 10 DATA N DB11 TO DB0 DATA (N – 1) DB11 TO DB0 DATA 1410 F18 Figure 18. ROM Mode Timing U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.
PAGE 16
LTC1410 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. SW Package 28-Lead Plastic Small Outline (Wide 0.300) (LTC DWG # 05-08-1620) 0.697 – 0.712* (17.70 – 18.08) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0.394 – 0.419 (10.007 – 10.643) NOTE 1 0.291 – 0.299** (7.391 – 7.595) 1 2 3 4 5 6 7 8 9 10 11 12 13 0.037 – 0.045 (0.940 – 1.143) 0.093 – 0.104 (2.362 – 2.642) 0.010 – 0.029 × 45° (0.254 – 0.737) 14 0° – 8° TYP 0.009 – 0.013 (0.