Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 28

LTC1414

14-Bit, 2.2Msps,

Sampling A/D Converter

Effective Bits and Signal-to-Noise + Distortion

vs Input Frequency

14-BIT ADC

OPTIONAL 3V

LOGIC SUPPLY

10µF

OGND

1414 TA01

DGND

D13 (MSB)

D0 (LSB)

BUSY

S/H

BUFFER

LTC1414

4.0625V

–5V

2.5V

REFERENCE

TIMING AND

LOGIC

OUTPUT

BUFFERS

•

CONVST

AGND

10µF

REF

COMP

–

1µF

INPUT FREQUENCY (Hz)

EFFECTIVE BITS

S/(N + D) (dB)

10k 100k 1M 10M

1414 TA02

SAMPLE

= 2.2MHz

TYPICAL APPLICATIO

The LTC

1414 is a 14-bit, 2.2Msps, sampling A/D con-

verter which draws only 175mW from ±5V supplies. This

high performance ADC includes a high dynamic range

sample-and-hold, a precision reference and requires no

external components.

The LTC1414’s high performance sample-and-hold has a

full-scale input range of ±2.5V. Outstanding AC perfor-

mance includes 80dB S/(N + D) and 95dB SFDR with a

100kHz input. The performance remains high at the Nyquist

input frequency of 1.1MHz with 78dB S/(N + D) and 84dB

SFDR.

The unique differential input sample-and-hold can acquire

single-ended or differential input signals up to its 40MHz

bandwidth. The 70dB common mode rejection can elimi-

nate ground loops and common mode noise by measuring

signal differentially from the source

The ADC has a microprocessor compatible, 14-bit parallel

output port. There is no pipline delay in the conversion

results.

■

Sample Rate: 2.2Msps

■

Outstanding Spectral Purity:

80dB S/(N + D) and 95dB SFDR at 100kHz

78dB S/(N + D) and 84dB SFDR at Nyquist

■

Ultralow Distortion with Single-Ended or

Differential Inputs

■

±2.5V Bipolar Input Range Eliminates Level Shifting

and Rail-to-Rail Op Amp Requirements

■

Easy Hookup for External or Internal Reference

■

No Pipeline Delay

■

Power Dissipation: 175mW on ±5V Supplies

■

28-Pin Narrow SSOP Package

, LTC and LT are registered trademarks of Linear Technology Corporation.

FEATURES

DESCRIPTIO

■

Telecommunications

■

Digital Signal Processing

■

Multiplexed Data Acquisition Systems

■

High Speed Data Acquisition

■

Spectrum Analysis

■

Imaging Systems

APPLICATIO S

Summary of content (20 pages)

PAGE 1
LTC1414 14-Bit, 2.2Msps, Sampling A/D Converter U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ Sample Rate: 2.2Msps Outstanding Spectral Purity: 80dB S/(N + D) and 95dB SFDR at 100kHz 78dB S/(N + D) and 84dB SFDR at Nyquist Ultralow Distortion with Single-Ended or Differential Inputs ±2.
PAGE 2
LTC1414 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION AVDD = OVDD = DVDD = VDD (Notes 1, 2) ORDER PART NUMBER TOP VIEW Supply Voltage (VDD) ................................................. 6V Negative Supply Voltage (VSS) ................................ – 6V Total Supply Voltage (VDD to VSS) .......................... 12V Analog Input Voltage (Note 3) ......................... (VSS – 0.3V) to (VDD + 0.3V) Digital Input Voltage (Note 4) ..........(VSS – 0.
PAGE 3
LTC1414 W U DY A IC ACCURACY (Note 5) SYMBOL PARAMETER CONDITIONS S/(N + D) Signal-to-Noise Plus Distortion Ratio 100kHz Input Signal 1.1MHz Input Signal MIN 80 78 dB dB THD Total Harmonic Distortion 100kHz Input Signal, First 5 Harmonics 1.1MHz Input Signal, First 5 Harmonics – 95 – 83 dB dB SFDR Spurious Free Dynamic Range 100kHz Input Signal, First 5 Harmonics 1.1MHz Input Signal, First 5 Harmonics 95 84 dB dB IMD Intermodulation Distortion fIN1 = 29.37kHz, fIN2 = 32.
PAGE 4
LTC1414 WU TI I G CHARACTERISTICS (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX fSAMPLE(MAX) Maximum Sampling Frequency ● 2.
PAGE 5
LTC1414 U W TYPICAL PERFOR A CE CHARACTERISTICS Spurious-Free Dynamic Range vs Input Frequency 0 2.0 0 fSAMPLE = 2.2MHz fIN1 = 80.566kHz fIN2 = 97.753kHz –10 –20 –20 –40 –50 –60 –70 1.0 –40 DNL (LSBs) –30 AMPLITUDE (dB) SPURIOUS-FREE DYNAMIC RANGE (dB) Differential Nonlinearity vs Output Code Intermodulation Distortion Plot –60 0 –80 –1.0 –80 –100 –90 –100 10k 100k 1M INPUT FREQUENCY (Hz) 10M –120 –2.
PAGE 6
LTC1414 U U U PIN FUNCTIONS AGND (Pin 27): Analog Ground. BUSY (Pin 25): The BUSY Output Shows the Converter Status. It is low when a conversion is in progress. AVDD (Pin 28): 5V Positive Supply. Bypass to AGND with 10µF ceramic or 10µF tantalum in parallel with 0.1µF ceramic. VSS (Pin 26): – 5V Negative Supply. Bypass to AGND with 10µF ceramic or 10µF tantalum in parallel with 0.1µF ceramic. W FUNCTIONAL BLOCK DIAGRA U U CSAMPLE AIN+ AVDD CSAMPLE DVDD AIN– 2k VREF VSS ZEROING SWITCHES 2.
PAGE 7
LTC1414 U W U U APPLICATIONS INFORMATION CONVERSION DETAILS The LTC1414 uses a successive approximation algorithm and an internal sample-and-hold circuit to convert an analog signal to a 14-bit parallel output. The ADC is complete with a precision reference and an internal clock. The device is easy to interface with microprocessors and DSPs. (Please refer to the Digital Interface section for the data format.
PAGE 8
LTC1414 U U W U APPLICATIONS INFORMATION 0 –40 EFFECTIVE BITS AMPLITUDE (dB) –20 –60 –80 86 13 80 12 74 11 68 10 S/(N + D) (dB) SINAD = 78dB SFDR = 84dB fSAMPLE = 2.2MHz fIN = 997.949kHz 14 9 8 7 6 5 4 –100 3 fSAMPLE = 2.2MHz 2 –120 0 200 400 600 800 FREQUENCY (kHz) 1k 1000 10k 100k 1M INPUT FREQUENCY (Hz) 10M 1414 TA02 1414 F02b Figure 2b. LTC1414 2048 Point FFT, Input Frequency = 1MHz Figure 3.
PAGE 9
LTC1414 U U W U APPLICATIONS INFORMATION (  amplitude at fa ± f b IMD f a ± fb = 20log  amplitude at fa  ( ) )    0 fSAMPLE = 2.2MHz fIN1 = 80.566kHz fIN2 = 97.753kHz AMPLITUDE (dB) –20 –40 Driving the Analog Input –60 –80 –100 –120 0 200 400 600 800 FREQUENCY (kHz) 1000 1414 F05a Figure 5a. Intermodulation Distortion Plot with Inputs at 80kHz and 97kHz 0 fSAMPLE = 2.2MHz fIN1 = 970.019kHz fIN2 = 1.
PAGE 10
LTC1414 U W U U APPLICATIONS INFORMATION Choosing an Input Amplifier AC Coupled Inputs Choosing an input amplifier is easy if a few requirements are taken into consideration. First, to limit the magnitude of the voltage spike seen by the amplifier from charging the sampling capacitor, choose an amplifier that has a low output impedance (<100Ω) at the closed-loop bandwidth frequency.
PAGE 11
LTC1414 U U W U APPLICATIONS INFORMATION R1 50Ω 1:N RP ANALOG INPUT C1 500pF RS R2 50Ω Input Range 1 AIN+ 2 AIN – 3 1µF 4 LTC1414 VREF REFCOMP The ±2.5V input range of the LTC1414 is optimized for low noise and low distortion. Most op amps also perform best over this same range, allowing direct coupling to the analog inputs and eliminating the need for special translation circuitry. 10µF 5 AGND LTC1414 • F08 Figure 8.
PAGE 12
LTC1414 U U W U APPLICATIONS INFORMATION 1 ANALOG INPUT ±2V TO ±3V DIFFERENTIAL 2 80 COMMON MODE REJECTION (dB) The VREF pin can be driven with a DAC or other means shown in Figure 11. This is useful in applications where the peak input signal amplitude may vary. The input span of the ADC can then be adjusted to match the peak input signal, maximizing the signal-to-noise ratio. The filtering of the internal LTC1414 reference amplifier will limit the bandwidth and settling time of this circuit.
PAGE 13
LTC1414 U U W U APPLICATIONS INFORMATION –5V R3 24k R1 50k ANALOG INPUT R4 100Ω 1 AIN+ 2 AIN – The LTC1414 has differential inputs to minimize noise coupling. Common mode noise on the AIN+ and AIN– inputs will be reflected by the input CMRR. The AIN– input can be used as a ground sense for the AIN+ input; the LTC1414 will hold and convert the difference voltage between AIN+ and AIN–. The leads to AIN+ (Pin 1) and AIN– (Pin 2) should be kept as short as possible.
PAGE 14
LTC1414 U U W U APPLICATIONS INFORMATION VSS VCC J3 5V AGND + D2 SS12 DGND J1 –5V D1 SS12 C2 22µF 10V + J2 GND VCC VLOGIC R14 20Ω 0.125W C2 22µF 10V + C10 10µF 10V VCC C12 0.1µF C14 0.1µF C7 0.1µF DGND J9 JP3 JP2 J4 A+ R15 51Ω R17 10k R18 10k JP4 J5 A– C11 470pF C4 0.1µF VOUT V + 7 U3 LT1363 2 – 6 3 + 8 V– 4 1 SO-8 V + 7 U1 LT1363 2 – 6 3 + 8 V– 4 1 DIP-8 (OPTIONAL) R16 51Ω C3 0.1µF VSS J10 VREF C8 1µF 10V J8 J7 CLK C13 4.
PAGE 15
LTC1414 U W U U APPLICATIONS INFORMATION Figure 16b.
PAGE 16
LTC1414 U W U U APPLICATIONS INFORMATION Figure 16c.
PAGE 17
LTC1414 U W U U APPLICATIONS INFORMATION Figure 16d.
PAGE 18
LTC1414 U U W U APPLICATIONS INFORMATION Digital Interface The output data is updated at the end of the conversion as BUSY rises. Output data is updated coincident with the rising edge of BUSY. Data will be valid, and can be latched, 20ns after the rising edge of BUSY. Valid data can also be latched with the falling edge of BUSY or with the rising edge of CONVST. In the latter two cases the data latched will be for the previous conversion. The A/D converter has just one control input CONVST.
PAGE 19
LTC1414 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. GN Package 28-Lead Plastic SSOP Narrow (0.150) (LTC DWG # 05-08-1641) 0.386 – 0.393* (9.804 – 9.982) 28 27 26 25 24 23 22 21 20 19 18 17 1615 0.229 – 0.244 (5.817 – 6.198) 0.150 – 0.157** (3.810 – 3.988) 1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0.0075 – 0.0098 (0.191 – 0.249) 0.033 (0.838) REF 2 3 4 5 6 7 8 9 10 11 12 13 14 0.053 – 0.069 (1.351 – 1.748) 0.004 – 0.009 (0.102 – 0.249) 0° – 8° TYP 0.016 – 0.
PAGE 20
LTC1414 U TYPICAL APPLICATIO 2.2MHz, 14-Bit Sampling ADC 5V DIFFERENTIAL ANALOG INPUT –2.5V TO 2.5V 1 AIN+ AVDD 2 AIN– AGND 3 VREF OUT 2.5V 4 1µF 10µF 5 REFCOMP AGND VSS BUSY CONVST DGND 6 D13 (MSB) 7 D12 8 D11 9 D10 10 D9 11 D8 14-BIT PARALLEL BUS 12 D7 13 D6 14 OGND 27 –5V 10µF 10µF LTC1414 VREF 28 DVDD OVDD D0 D1 D2 D3 D4 D5 26 25 24 23 22 0.