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LTC1665/LTC1660

166560fa

BLOCK DIAGRAM

FEATURES DESCRIPTION

Micropower Octal

8-Bit and 10-Bit DACs

The 8-bit LTC

1665 and 10-bit LTC1660 integrate eight

accurate, serially addressable digital-to-analog convert-

ers (DACs) in tiny 16-pin narrow SSOP packages. Each

buffered DAC draws just 56μA total supply current, yet

is capable of supplying DC output currents in excess

of 5mA and reliably driving capacitive loads to 1000pF.

Sleep mode further reduces total supply current to 1μA.

Linear Technology’s proprietary, inherently monotonic volt-

age interpolation architecture provides excellent linearity

while allowing for an exceptionally small external form factor.

Ultralow supply current, power-saving Sleep mode and

extremely compact size make the LTC1665 and LTC1660

ideal for battery-powered applications, while their ease

of use, high performance and wide supply range make

them excellent choices as general purpose converters.

LTC1665 Differential Nonlinearity (DNL)

LTC1660 Differential Nonlinearity (DNL)

APPLICATIONS

Tiny: 8 DACs in the Board Space of an SO-8

Micropower: 56μA per DAC Plus

1μA Sleep Mode for Extended Battery Life

Pin Compatible 8-Bit LTC1665 and 10-Bit LTC1660

Wide 2.7V to 5.5V Supply Range

Rail-to-Rail Voltage Outputs Drive 1000pF

Reference Range Includes Supply for Ratiometric

0V-to-V

Output

Reference Input Impedance is Constant—

Eliminates External Buffer

Mobile Communications

Remote Industrial Devices

Automatic Calibration for Manufacturing

Portable Battery-Powered Instruments

Trim/Adjust Applications

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

1GND

OUT A

OUT B

OUT C

OUT D

REF

CS/LD

SCK

OUT H

OUT G

OUT F

OUT E

CLR

OUT

166560 BD

DAC A DAC H

3 14

DAC B DAC G

4 13

DAC C DAC F

DAC D DAC E

ADDRESS

DECODER

CONTROL

LOGIC

SHIFT REGISTER

CODE

0 64 128 192 255

LSB

166560 G09

0.5

0.4

0.3

0.2

0.1

–0.1

–0.2

–0.3

–0.4

–0.5

= 5V

REF

= 4.096V

CODE

0 256 512 768 1023

LSB

166560 G13

0.8

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

–1

= 5V

REF

= 4.096V

Summary of content (18 pages)

PAGE 1
LTC1665/LTC1660 Micropower Octal 8-Bit and 10-Bit DACs DESCRIPTION FEATURES n n n n n n n Tiny: 8 DACs in the Board Space of an SO-8 Micropower: 56μA per DAC Plus 1μA Sleep Mode for Extended Battery Life Pin Compatible 8-Bit LTC1665 and 10-Bit LTC1660 Wide 2.7V to 5.
PAGE 2
LTC1665/LTC1660 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW VCC to GND ............................................... –0.2V to 7.5V Logic Inputs to GND ................................. –0.2V to 7.5V VOUT A, VOUT B, VOUT H, REF to GND .................................–0.2V to (VCC + 0.2V) Maximum Junction Temperature .......................... 125°C Operating Temperature Range LTC1665C/LTC1660C .............................. 0°C to 70°C LTC1665I/LTC1660I ............................
PAGE 3
LTC1665/LTC1660 ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, VREF ≤ VCC, VOUT unloaded, unless otherwise noted. LTC1665 SYMBOL PARAMETER CONDITIONS MIN TYP LTC1660 MAX MIN TYP MAX UNITS Accuracy Resolution l 8 8 10 Bits Monotonicity VREF ≤ VCC – 0.1V (Note 2) l DNL Differential Nonlinearity VREF ≤ VCC – 0.1V (Note 2) l ± 0.1 ±0.5 ±0.2 ±0.
PAGE 4
LTC1665/LTC1660 TIMING CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (See Figure 1) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC = 4.5V to 5.
PAGE 5
LTC1665/LTC1660 TYPICAL PERFORMANCE CHARACTERISTICS Midscale Output Voltage vs Load Current 2 VREF = VCC CODE = 128 (LTC1665) CODE = 512 (LTC1660) 1.9 VOUT (V) 2.6 VCC = 5V 2.5 2.4 2.3 VCC = 3.6V 1.7 VCC = 5.5V 2.2 1000 1.6 VCC = 3V 1.5 1.4 VCC = 2.7V 1.3 VCC = 4.5V 125°C 800 25°C 600 –55°C 400 1.2 2.1 200 1.
PAGE 6
LTC1665/LTC1660 TYPICAL PERFORMANCE CHARACTERISTICS (LTC1665) Integral Nonlinearity (INL) 1 VCC = 5V VREF = 4.096V 0.8 VCC = 5V VREF = 4.096V 0.4 0.6 0.3 0.4 0.2 0.2 0.1 LSB LSB Differential Nonlinearity (DNL) 0.5 0 0 –0.2 –0.1 –0.4 –0.2 –0.6 –0.3 –0.8 –0.4 –1 –0.5 0 64 128 CODE 192 255 0 64 128 CODE 192 166560 G09 1665/60 G08 Load Regulation vs Output Current Load Regulation vs Output Current VCC = VREF = 5V CODE = 128 0.5 0.5 VCC = VREF = 3V CODE = 128 0.
PAGE 7
LTC1665/LTC1660 TYPICAL PERFORMANCE CHARACTERISTICS (LTC1660) Integral Nonlinearity (INL) 2.5 VCC = 5V VREF = 4.096V 2.0 VCC = 5V VREF = 4.096V 0.8 1.5 0.6 1.0 0.4 0.5 0.2 LSB LSB Differential Nonlinearity (DNL) 1 0 0 – 0.5 –0.2 –1.0 –0.4 –1.5 –0.6 – 2.0 –0.8 – 2.5 –1 0 256 512 CODE 768 1023 0 256 512 CODE 768 1023 166560 G13 166560 G12 Load Regulation vs Output Current 2 Load Regulation vs Output Current VCC = VREF = 5V CODE = 512 2 1.5 1.
PAGE 8
LTC1665/LTC1660 PIN FUNCTIONS (LTC1665/LTC1660) GND (Pin 1): System Ground. VOUT A to VOUT H (Pins 2-5 and 12-15): DAC Analog Voltage Outputs. The output range is ⎛ 255 ⎞ 0 to ⎜ V for the LTC1665 ⎝ 256 ⎟⎠ REF ⎛ 1023 ⎞ 0 to ⎜ V for the LTC1660 ⎝ 1024 ⎟⎠ REF REF (Pin 6): Reference Voltage Input. 0V ≤ VREF ≤ VCC. CS/LD (Pin 7): Serial Interface Chip Select/Load Input. When CS/LD is low, SCK is enabled for shifting data on DIN into the register.
PAGE 9
LTC1665/LTC1660 TIMING DIAGRAM t1 t2 t3 t6 t4 SCK t9 t11 DIN A3 t5 A1 A2 X1 X0 t7 CS/LD t8 DOUT A3 A2 A1 X1 X0 A3 166560 F01 Figure 1 OPERATION Transfer Function Serial Interface The transfer function is: Referring to Figure 2a (2b): With CS/LD held low, data on the DIN input is shifted into the 16-bit shift register on the positive edge of SCK.
PAGE 10
LTC1665/LTC1660 OPERATION SCK 1 A3 DIN 2 A2 3 4 A1 A0 5 D7 6 D6 7 8 D5 D4 ADDRESS/CONTROL 9 10 D3 D2 11 D1 12 D0 13 X3 INPUT CODE 14 X2 15 X1 16 X0 DON’T CARE INPUT WORD W0 CS/LD (ENABLE CLK) DOUT (UPDATE OUTPUT) A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0 A3 INPUT WORD W–1 INPUT WORD W0 166560 F02a Figure 2a.
PAGE 11
LTC1665/LTC1660 OPERATION Voltage Outputs Table 2. DAC Address/Control Functions ADDRESS/CONTROL Each of the eight rail-to-rail output amplifiers contained in these parts can source or sink up to 5mA. The outputs swing to within a few millivolts of either supply rail when unloaded and have an equivalent output resistance of 85Ω when driving a load to the rails. The output amplifiers are stable driving capacitive loads up to 1000pF.
PAGE 12
LTC1665/LTC1660 OPERATION POSITIVE FSE VREF = VCC OUTPUT VOLTAGE INPUT CODE (c) VREF = VCC OUTPUT VOLTAGE 0 128 INPUT CODE (a) 255 OUTPUT VOLTAGE 0V NEGATIVE OFFSET INPUT CODE (b) 166560 F03 Figure 3. Effects of Rail-to-Rail Operation On a DAC Transfer Curve.
PAGE 13
LTC1665/LTC1660 TYPICAL APPLICATIONS A Low Power Quad Trim Circuit with Coarse/Fine Adjustment 3.3V 3.3V R1 R2 0.1μF 0.1μF R2 4 – VOUT1 U2A LT®1491 + 1 GND 2 R1 COARSE V OUT A 3 U1 LTC1665 1 2 DAC A 16 DAC H 15 VCC VOUT H R1 COARSE VOUT G R2 FINE VOUT F R1 COARSE VOUT E R2 FINE R1 13 – 12 +LT1491 14 U2D VOUT4 11 0.1μF 0.1μF R1 R2 – VOUT2 U2B LT1491 + 7 R2 FINE VOUT B 3 DAC B DAC G 14 R1 9 6 R1 COARSE VOUT C 5 4 DAC C DAC F 13 0.1μF 3.3V R2 0.
PAGE 14
LTC1665/LTC1660 TYPICAL APPLICATIONS An 8-Channel Bipolar Output Voltage Circuit Configuration 5V R R R R 0.1μF 0.1μF VS+ 1 U2A LT1491 + VOUT A ´ ±5V – 4 0.1μF 11 + DAC A DAC H 15 VOUT H 3 +LT1491 R VOUT H ´ ±5V 1 11 0.
PAGE 15
LTC1665/LTC1660 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. GN Package 16-Lead Plastic SSOP (Narrow 0.150) (LTC DWG #05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ±.0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ±.004 w 45s (0.38 ±0.10) .007 – .0098 (0.178 – 0.249) .0532 – .0688 (1.35 – 1.
PAGE 16
LTC1665/LTC1660 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. N Package 16-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510 Rev I) .770* (19.558) MAX 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 .255 ± .015* (6.477 ± 0.381) .300 – .325 (7.620 – 8.255) .008 – .015 (0.203 – 0.381) +.035 .325 –.015 +0.889 8.255 –0.381 .130 ± .005 (3.302 ± 0.127) .045 – .065 (1.143 – 1.651) .020 (0.508) MIN .065 (1.651) TYP .
PAGE 17
LTC1665/LTC1660 REVISION HISTORY REV DATE DESCRIPTION A 1/12 Removed Typical values in Timing Characteristics PAGE NUMBER 3, 4 166560fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PAGE 18
LTC1665/LTC1660 TYPICAL APPLICATION A Pin Driver VH and VL Adjustment Circuit for ATE Applications 5V 11 16 6 CLR VCC REF 0.1μF VH (FROM MAIN DAC) U1 LTC1660 DAC A DAC H 2 RG VA 50k 10V RF 5k 3 2 DAC B DAC G 3 + U2A LT1369 QUAD – 5V VL (FROM MAIN DAC) DAC F DAC C 4 CS/LD 7 DIN 9 SCK 8 DAC D 5 VH´ VH´ = VH + ΔVH VL´ 0.1μF 0.1μF RF 5k VH VL RF 5k 5 6 DAC E 1 – RG VB 50k RG VC 50k 0.1μF + U2B LT1369 QUAD 7 VL´ = VL + VL VOUT 0.