Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 28

LTC1857/LTC1858/LTC1859

185789fa

100kHz, 12-Bit/14-Bit/16-Bit Sampling ADC

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

8-Channel, 12-/14-/16-Bit,

100ksps SoftSpan A/D

Converters with Shutdown

The LTC

1857/LTC1858/LTC1859 are 8-channel, low

power, 12-/14-/16-bit, 100ksps, analog-to-digital convert-

ers (ADCs). These SoftSpan™ ADCs can be software-

programmed for 0V to 5V, 0V to 10V, ±5V or ±10V input

spans and operate from a single 5V supply. The 8-channel

multiplexer can be programmed for single-ended inputs

or pairs of differential inputs or combinations of both. In

addition, all channels are fault protected to ±25V. A fault

condition on any channel will not affect the conversion

result of the selected channel.

An onboard high performance sample-and-hold and pre-

cision reference minimize external components. The low

40mW power dissipation is made even more attractive with

two user selectable power shutdown modes. DC speciﬁ ca-

tions include ±3LSB INL for the LTC1859, ±1.5LSB INL

for the LTC1858 and ±1LSB for the LTC1857.

The internal clock is trimmed for 5μs maximum conversion

time and the sampling rate is guaranteed at 100ksps. A

separate convert start input and data ready signal (BUSY)

ease connections to FIFOs, DSPs and microprocessors.

Sample Rate: 100ksps

8-Channel Multiplexer with ±25V Protection

Single 5V Supply

Software-Programmable Input Ranges:

0V to 5V, 0V to 10V, ±5V or ±10V

Single Ended or Differential

±3LSB INL for the LTC1859, ±1.5LSB INL for the

LTC1858, ±1LSB INL for the LTC1857

Power Dissipation: 40mW (Typ)

SPI/MICROWIRE™ Compatible Serial I/O

Power Shutdown: Nap and Sleep

n Signal-to-Noise Ratio: 87dB (Typ) for the LTC1859

n Operates with Internal or External Reference

n Internal Synchronized Clock

n 28-Pin SSOP Package

Industrial Process Control

Multiplexed Data Acquisition Systems

High Speed Data Acquisition for PCs

Digital Signal Processing

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. SoftSpan is

a trademark of Linear Technology Corporation. All other trademarks are the property of their

respective owners.

LTC1859 Typical INL Curve

COM

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

MUXOUT

–

ADC

–

AGND1

CONVST

SCK

SDI

DGND

SDO

BUSY

AGND3

AGND2

REFCOMP

REF

LTC1857/

LTC1858/

LTC1859

SOFTWARE-PROGRAMMABLE

SINGLE-ENDED OR

DIFFERENTIAL INPUTS

(0V TO 5V, 0V TO 10V,

±5V OR ±10V)

10μF

10μF1μF

10μF

3V TO 5V

2.5V

10μF

μP

CONTROL

LINES

CODE

–32768

INL (LSB)

0.5

1.0

1859 TA02

–0.5

–1.0

–2.0

–16384 16384 32767

–1.5

2.0

1.5

Summary of content (20 pages)

PAGE 1
LTC1857/LTC1858/LTC1859 8-Channel, 12-/14-/16-Bit, 100ksps SoftSpan A/D Converters with Shutdown FEATURES DESCRIPTION n The LTC®1857/LTC1858/LTC1859 are 8-channel, low power, 12-/14-/16-bit, 100ksps, analog-to-digital converters (ADCs). These SoftSpan™ ADCs can be softwareprogrammed for 0V to 5V, 0V to 10V, ±5V or ±10V input spans and operate from a single 5V supply. The 8-channel multiplexer can be programmed for single-ended inputs or pairs of differential inputs or combinations of both.
PAGE 2
LTC1857/LTC1858/LTC1859 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW Supply Voltage (OVDD = DVDD = AVDD = VDD) .............6V Ground Voltage Difference DGND, AGND1, AGND2, AGND3 ........................±0.3V Analog Input Voltage ADC+, ADC– (Note 3) ................. (AGND1 – 0.3V) to (AVDD + 0.3V) CH0-CH7, COM ..................................................±25V Digital Input Voltage (Note 4).......(DGND – 0.3V) to 10V Digital Output Voltage ..(DGND – 0.3V) to (DVDD + 0.
PAGE 3
LTC1857/LTC1858/LTC1859 CONVERTER AND MULTPLEXER CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. MUXOUT connected to ADC inputs.
PAGE 4
LTC1857/LTC1858/LTC1859 DYNAMIC ACCURACY The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. MUXOUT connected to ADC inputs.
PAGE 5
LTC1857/LTC1858/LTC1859 TIMING CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C.
PAGE 6
LTC1857/LTC1858/LTC1859 TYPICAL PERFORMANCE CHARACTERISTICS LTC1859 Typical INL Curve 0 1.5 1.5 1.0 1.0 0.5 0.5 0 –0.5 MAGNITUDE (dB) 2.0 DNL (LSB) 0 –0.5 –1.0 –1.0 –1.5 –1.5 –2.0 –32768 –16384 0 CODE 16384 –2.0 –32768 32767 –16384 1859 G01 LTC1859 SINAD vs Input Frequency 0 CODE 16384 TOTAL HARMONIC DISTORTION (dB) 86 84 82 80 78 74 1.0 –80 –90 –110 10 INPUT FREQUENCY (kHz) 1 100 10 INPUT FREQUENCY (kHz) 1 –1.0 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 1959 G07 –0.
PAGE 7
LTC1857/LTC1858/LTC1859 TYPICAL PERFORMANCE CHARACTERISTICS LTC1859 Power Supply Feedthrough vs Ripple Frequency fSAMPLE = 100kHz VRIPPLE = 60mV –30 –40 –50 –60 fSAMPLE = 100kHz 8.5 8.0 7.5 –70 –80 100 1k 10k 100k RIPPLE FREQUENCY (Hz) 1M 1859 G10 Supply Current vs Temperature 9.0 POSITIVE SUPPLY CURRENT (mA) –20 Supply Current vs Supply Voltage 9.0 SUPPLY CURRENT (mA) POWER SUPPLY FEEDTHROUGH (dB) –10 7.0 4.5 5 5.25 4.75 SUPPLY VOLTAGE (V) 5.5 fSAMPLE = 100kHz 8.5 8.0 7.5 7.
PAGE 8
LTC1857/LTC1858/LTC1859 PIN FUNCTIONS RD (Pin 27): Read Input. This active low signal enables the digital output pin SDO. DGND (Pin 24): Digital Ground. SDI (Pin 25): Serial Data Input. CONVST (Pin 28): Conversion Start. This active high signal starts a conversion on its rising edge. SCK (Pin 26): Serial Data Clock.
PAGE 9
LTC1857/LTC1858/LTC1859 TIMING DIAGRAMS t2 (CONVST to BUSY Delay) t2 t1 (For Short Pulse Mode) CONVST 2.4V t1 BUSY 50% 50% CONVST 0.4V 1859 TD02 1859 TD01 t6 (Delay Time, SCKn to SDO Valid) t7 (Time from Previous Data Remains Valid After SCKn) t6 t7 t3, t4, t5 (SCK Timing) SCK t4 0.4V t5 SCK 2.4V 0.4V SDO t3 1859 TD03 1859 TD04 t9 (RDn to SCK Setup Time) t8 (SDO Valid After RDn) t8 RD RD SDO t9 0.4V 0.4V Hi-Z 2.4V 0.4V 2.
PAGE 10
LTC1857/LTC1858/LTC1859 OPERATION OVERVIEW The LTC1857/LTC1858/LTC1859 are innovative, multichannel ADCs that provide software-selectable input ranges for each of their eight input channels. Using on-chip resistors and switches, it provides an attenuation and offset that can be programmed for each channel on the ﬂy. The precisely trimmed attenuators ensure accurate input ranges. Because they precede the multiplexer, errors due to multiplexer on-resistance are eliminated.
PAGE 11
LTC1857/LTC1858/LTC1859 APPLICATIONS INFORMATION AVDD DVDD MUX ADDRESS AND RANGE CH0 CONVST CONTROL LOGIC CH1 INTERNAL CLOCK INPUT MUX AND RANGE SELECT • • • SDI BUSY SCK + 12-/14-/16-BIT SAMPLING ADC CH7 – COM RD DATA OUT SERIAL I/O OVDD SDO 4.096V 2.5V REFERENCE 8k MUXOUT– MUXOUT+ ADC+ 1.6384X ADC– 1859 BD VREF AGND1 REFCOMP AGND2 AGND3 DGND Figure 1. LTC1857/LTC1858/LTC1859 Simpliﬁed Equivalent Circuit AIN+ AIN– LT1792: Single, low noise JFET input op amp, ±5V supplies.
PAGE 12
LTC1857/LTC1858/LTC1859 APPLICATIONS INFORMATION the output of the reference is available at VREF (Pin 15). The internal reference can be overdriven with an external reference if more accuracy is needed. The buffer output drives the internal DAC and is available at REFCOMP (Pin 16). The REFCOMP pin can be used to drive a steady DC load of less than 2mA. Driving an AC load is not recommended because it can cause the performance of the converter to degrade. 15 VREF 2.5V 8k 1μF 2.
PAGE 13
LTC1857/LTC1858/LTC1859 APPLICATIONS INFORMATION 11 1111 1111 1111 for the LTC1858 and between 0000 0000 0000 and 1111 1111 1111 for the LTC1857. For bipolar inputs, an input voltage of FS – 1.5LSBs should be applied to the “+” input and the appropriate reference adjusted until the output code ﬂickers between 0111 1111 1111 1110 and 0111 1111 1111 1111 for the LTC1859, between 01 1111 1111 1110 and 01 1111 1111 1111 for the LTC1858 and between 0111 1111 1110 and 0111 1111 1111 for the LTC1857.
PAGE 14
Hi-Z DON’T CARE Hi-Z DON’T CARE t5 SGL/ DIFF t4 1 t10 t3 t4 1 B15 (MSB) t8 t5 t10 t3 SGL/ DIFF t8 B15 (MSB) t9 t12 B14 ODD/ SIGN t11 2 SELECT 0 4 UNI 5 GAIN 6 B12 B11 B10 B9 NAP 7 B8 SLEEP 8 tACQ B1 DON’T CARE 15 t7 B0 (LSB) t6 16 t2 t1 tCONV t12 B15 (MSB) SGL/ DIFF 1 B14 ODD/ SIGN 2 SELECT 0 4 UNI 5 GAIN 6 NAP 7 SLEEP SELECT 0 4 UNI 5 GAIN 6 B13 B12 B11 B10 SHIFT CONFIGURATION WORD IN SELECT 1 3 B9 NAP 7 B8 SLEEP 8 tACQ
PAGE 15
LTC1857/LTC1858/LTC1859 APPLICATIONS INFORMATION three-state at this time. When the conversion is complete (BUSY goes high), CONVST and RD go low to enable the data output for the previous conversion. next data transfer cycle. As shown below, the result of a conversion is delayed by one conversion from the input word requesting it.
PAGE 16
LTC1857/LTC1858/LTC1859 APPLICATIONS INFORMATION MUX ADDRESS The ﬁrst four bits of the input word assign the MUX conﬁguration for the requested conversion. For a given channel selection, the converter will measure the voltage between the two channels indicated by the + and – signs in the selected row of Table 1. Note that in differential mode (SGL/DIFF = 0) measurements are limited to four adjacent input pairs with either polarity. In single-ended mode, all input channels are measured with respect to COM.
PAGE 17
tCONV DON’T CARE tCONV DON’T CARE B15 (MSB) SGL/ DIFF SGL/ DIFF 1 B15 (MSB) 3 SELECT 0 4 UNI 5 GAIN 6 B13 B14 ODD/ SIGN 2 B14 ODD/ SIGN 2 SELECT 1 3 B11 SELECT 0 4 B10 UNI 5 8 B9 GAIN 6 B8 B12 B11 B10 A/D RESULT NOT VALID B9 B8 SLEEP = 1 8 SELECT 0 4 UNI 5 GAIN 6 B13 B12 B10 SLEEP tCONV Hi-Z NAP B15 MSB SGL/ DIFF 1 B1 DON’T CARE 15 B0 (LSB) 16 SELECT 1 B9 NAP 7 B8 SLEEP = 0 8 B1 DON’T CARE 15 WAKE-UP TIME B0 (LSB) 16 READY tCONV 3
PAGE 18
LTC1857/LTC1858/LTC1859 APPLICATIONS INFORMATION SIGNAL-TO-NOISE RATIO The Signal-to-Noise and Distortion Ratio (SINAD) is the ratio between the RMS amplitude of the fundamental input frequency to the RMS amplitude of all other frequency components at the A/D output. The output is band limited to frequencies from above DC and below half the sampling frequency. Figure 12 shows a typical SINAD of 87dB with a 100kHz sampling rate and a 1kHz input.
PAGE 19
LTC1857/LTC1858/LTC1859 APPLICATIONS INFORMATION LTC1858/LTC1859 can be tied to the analog ground plane. Placing the bypass capacitor as close as possible to the power supply pins, the reference and reference buffer output is very important. Low impedance common returns for these bypass capacitors are essential to low noise operation of the ADC, and the foil width for these tracks should be as wide as possible.
PAGE 20
LTC1857/LTC1858/LTC1859 TYPICAL APPLICATION 5V 5V 10μF 0.1μF 10μF 19 DVDD AVDD 1 COM CONVST 28 MUX ADDRESS AND RANGE 2 CH0 SINGLE-ENDED OR DIFFERENTIAL CHANNEL SELECTION (SEE TABLE 1) INPUT RANGES: 0V TO 5V 0V TO 10V ±5V AND ±10V SDI 25 CONTROL LOGIC 3 CH1 BUSY 22 INTERNAL CLOCK INPUT MUX AND RANGE SELECT • • • 0.1μF 20 8-BIT SERIAL DATA INPUT SCK 26 16 SHIFT CLOCK CYCLES + 9 CH7 12-/14-/16-BIT SAMPLING ADC RD 27 DATA OUT OVDD 21 – 4.096V 16-BIT SERIAL DATA OUT 1.