Datasheet

ManualsBrandsLinear Technology ManualsData & Signal ConvertersRMS/DC Converter IC MSOP

LTC1968

1968f

Precision Wide Bandwidth,

RMS-to-DC Converter

■

High Linearity:

0.02% Linearity Allows Simple System Calibration

■

Wide Input Bandwidth:

Bandwidth to 1% Additional Gain Error: 500kHz

Bandwidth to 0.1% Additional Gain Error: 150kHz

3dB Bandwidth Independent of Input Voltage

Amplitude

■

No-Hassle Simplicity:

True RMS-DC Conversion with Only One External

Capacitor

Delta Sigma Conversion Technology

■

Ultralow Shutdown Current:

0.1µA

■

Flexible Inputs:

Differential or Single Ended

Rail-to-Rail Common Mode Voltage Range

Up to 1V

PEAK

Differential Voltage

■

Flexible Output:

Rail-to-Rail Output

Separate Output Reference Pin Allows Level Shifting

■

Small Size:

Space Saving 8-Pin MSOP Package

■

True RMS Digital Multimeters and Panel Meters

■

True RMS AC + DC Measurements

DESCRIPTIO

FEATURES

APPLICATIO S

The LTC

1968 is a true RMS-to-DC converter that uses an

innovative delta-sigma computational technique. The ben-

efits of the LTC1968 proprietary architecture, when com-

pared to conventional log-antilog RMS-to-DC converters,

are higher linearity and accuracy, bandwidth independent

of amplitude and improved temperature behavior.

The LTC1968 operates with single-ended or differential in-

put signals and accurately supports crest factors up to 4.

Common mode input range is rail-to-rail. Differential in-

put range is 1V

PEAK

, and offers unprecedented linearity. The

LTC1968 allows hassle-free system calibration at any in-

put voltage.

The LTC1968 has a rail-to-rail output with a separate out-

put reference pin providing flexible level shifting; it oper-

ates on a single power supply from 4.5V to 5.5V. A low power

shutdown mode reduces supply current to 0.1µA.

The LTC1968 is packaged in the space-saving MSOP pack-

age, which is ideal for portable applications.

Single Supply RMS-to-DC Converter

AVE

10µF

OUT

–

1968 TA01

4.5V TO 5.5V

OUTPUT

DIFFERENTIAL

INPUT

LTC1968

0.1µF

OPT. AC

COUPLING

EN GND

OUT RTN

IN1

IN2

TYPICAL APPLICATIO

(mV AC

RMS

)

–1.0

LINEARITY ERROR (V

OUT

mV DC – V

mV AC

RMS

)

–0.8

–0.6

–0.4

–0.2

0.2

100 200 300 400

1968 TA01b

500

LTC1968, ∆Σ

60Hz SINEWAVE

CONVENTIONAL

LOG/ANTILOG

Linearity Performance

, LTC and LT are registered trademarks of Linear Technology Corporation.

Protected under U.S. Patent Numbers 6,359,576, 6,362,677 and 6,516,291

Summary of content (28 pages)

PAGE 1
LTC1968 Precision Wide Bandwidth, RMS-to-DC Converter U FEATURES DESCRIPTIO ■ The LTC®1968 is a true RMS-to-DC converter that uses an innovative delta-sigma computational technique. The benefits of the LTC1968 proprietary architecture, when compared to conventional log-antilog RMS-to-DC converters, are higher linearity and accuracy, bandwidth independent of amplitude and improved temperature behavior. ■ ■ ■ ■ ■ ■ High Linearity: 0.
PAGE 2
LTC1968 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) Supply Voltage V+ to GND ............................................................. 6V Input Currents (Note 2) ..................................... ±10mA Output Current (Note 3) ..................................... ±10mA ENABLE Voltage ......................................... –0.3V to 6V OUT RTN Voltage ........................................ –0.3V to V+ Operating Temperature Range (Note 4) LTC1968C/LTC1968I ......
PAGE 3
LTC1968 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. V+ = 5V, VOUTRTN = 2.5V, CAVE = 10µF, VIN = 200mVRMS, VENABLE = 0.5V unless otherwise noted.
PAGE 4
LTC1968 U W TYPICAL PERFOR A CE CHARACTERISTICS Gain and Offset vs Input Common Mode Voltage 0.4 50mV ≤ VIN ≤ 350mV 0.5 0.8 0.4 0.6 0.3 0.4 0.1 0.2 GAIN ERROR 0 0 VOOS –0.1 –0.2 VIOS –0.2 –0.4 0.2 1.0 50mV ≤ VIN ≤ 350mV 0.8 0.6 GAIN ERROR 0.4 0.2 0.1 0 0 –0.1 –0.2 VIOS VOOS –0.2 –0.4 –0.3 –0.6 –0.3 –0.6 –0.4 –0.8 –0.4 –0.8 –0.5 –1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 INPUT COMMON MODE VOLTAGE (V) –0.5 –1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.
PAGE 5
LTC1968 U W TYPICAL PERFOR A CE CHARACTERISTICS Performance vs Crest Factor 200.2 1kHz 200.0 10kHz 60Hz 199.6 199.4 199.0 2 1 3 CREST FACTOR 4 10kHz 200 40kHz 190 60Hz 5 1kHz 180 170 160 150 –0.15 –0.20 7 8 0 100 0.04 0.02 0 –0.02 –0.04 2.44 2.5 2.42 2.0 1.5 1.0 0 500 0 Power Supply and ENABLE Pin Current vs ENABLE Voltage 1 2 3 4 SUPPLY VOLTAGE (V) 5 2.38 2.36 2.34 2.30 –55 –35 –15 6 Input Signal Bandwidth vs RMS Value 2.
PAGE 6
LTC1968 U W TYPICAL PERFOR A CE CHARACTERISTICS 40 202 0.
PAGE 7
LTC1968 U U U PI FU CTIO S GND (Pin 1): Ground. The power return pin. IN1 (Pin 2): Differential Input. DC coupled (polarity is irrelevant). IN2 (Pin 3): Differential Input. DC coupled (polarity is irrelevant). VOUT (Pin 5): Output Voltage. Pin 5 is high impedance. The RMS averaging is accomplished with a single shunt capacitor from Pin 5 to OUT RTN. The transfer function is given by: OUT RTN (Pin 6): Output Return. The output voltage is created relative to this pin.
PAGE 8
LTC1968 U W U U APPLICATIO S I FOR ATIO currents. The power delivered to the load depends on the firing angle, as well as any parasitic losses such as switch “ON” voltage drop. Real circuit waveforms will also typically have significant ringing at the switching transition, dependent on exact circuit parasitics. For the purposes of this data sheet, “SCR Waveforms” refers to the ideal chopped sine wave, though the LTC1968 will do faithful RMS-to-DC conversion with real SCR waveforms as well.
PAGE 9
LTC1968 U W U U APPLICATIO S I FOR ATIO Dα VIN VOUT Note that the internal scalings are such that the ∆Σ output duty cycle is limited to 0% or 100% only when VIN exceeds ±4 • VOUT. ∆-Σ REF VIN Linearity of an RMS-to-DC Converter ±1 LPF VOUT 1968 F04 Figure 4. Topology of LTC1968 The ∆Σ modulator has a single-bit output whose average duty cycle (D) will be proportional to the ratio of the input signal divided by the output. The ∆Σ is a 2nd order modulator with excellent linearity.
PAGE 10
LTC1968 U W U U APPLICATIO S I FOR ATIO Because this peak has energy (proportional to voltage squared) that is 16 times (42) the energy of the RMS value, the peak is necessarily present for at most 6.25% (1/16) of the time. The LTC1968 performs very well with crest factors of 4 or less and will respond with reduced accuracy to signals with higher crest factors. The high performance with crest factors less than 4 is directly attributable to the high linearity throughout the LTC1968.
PAGE 11
LTC1968 U W U U APPLICATIO S I FOR ATIO 0 –0.2 PEAK ERROR (%) –0.4 –0.6 C = 220µF C = 100µF C = 47µF C = 22µF C = 10µF C = 4.7µF C = 2.2µF C =1µF –0.8 –1.0 –1.2 –1.4 –1.6 –1.8 –2.0 1 10 100 1000 INPUT FREQUENCY (Hz) 1968 F08 Figure 8. Peak Error vs Input Frequency with One Cap Averaging because of the computation of the square of the input. The typical values shown, 5% peak ripple with 0.05% DC error, occur with CAVE = 10µF and fINPUT = 6Hz.
PAGE 12
LTC1968 U W U U APPLICATIO S I FOR ATIO Input Connections work well with dual supply configurations, but in single supply configurations it will be necessary to raise the voltage on the grounded input to assure that the signal at the active input stays within the range of 0V to V+. If there is already a suitable voltage reference available, connect the second input to that point. If not, a midsupply voltage can be created with two resistors as shown in Figure 9b.
PAGE 13
LTC1968 U W U U APPLICATIO S I FOR ATIO Output Connections The LTC1968 output is differentially, but not symmetrically, generated. That is to say, the RMS value that the LTC1968 computes will be generated on the output (Pin 5) relative to the output return (Pin 6), but these two pins are not interchangeable. For most applications, Pin 6 will be tied to ground (Pin 1). However, Pin 6 can be tied to any voltage between 0V and V+ (Pin 7) less the maximum output voltage swing desired.
PAGE 14
LTC1968 U W U U APPLICATIO S I FOR ATIO 100mV to 110mV (+10%) and back (–10%), the step responses are essentially the same as a standard exponential rise and decay between those two levels. In such cases, the time constant of the decay will be in between that of the rising edge and falling edge cases of Figure 10. Therefore, the worst case is the falling edge response as it goes to zero, and it can be used as a design guide.
PAGE 15
LTC1968 U W U U APPLICATIO S I FOR ATIO Reducing Ripple with a Post Filter The output ripple is always much larger than the DC error, so filtering out the ripple can reduce the peak error substantially, without the large settling time penalty of simply increasing the averaging capacitor. Figure 12 shows a basic 2nd order post filter, for a net 3rd order filtering of the LTC1968 RMS calculation. It uses the 12.
PAGE 16
LTC1968 U W U U APPLICATIO S I FOR ATIO somewhat lower (≈0.7 • 1.27 ≈ 0.9Hz) than with 10µF alone. To adjust the bandwidth of either of them, simply scale all the capacitors by a common multiple, and leave the resistors unchanged. The step responses of the LTC1968 with 10µF-only and with the two post filters are shown in Figure 14. This is the rising edge RMS output response to a 10Hz input starting at t = 0.
PAGE 17
LTC1968 U W U U APPLICATIO S I FOR ATIO 0 C = 100µF –0.2 PEAK ERROR (%) –0.4 –0.6 C = 47µF C = 22µF C = 10µF C = 4.7µF C = 2.2µF C =1µF C = 0.47µF C = 0.22µF C = 0.1µF –0.8 –1.0 –1.2 –1.4 –1.6 –1.8 –2.0 1 10 100 1000 INPUT FREQUENCY (Hz) 1968 F08 Figure 16. Peak Error vs Input Frequency with Buffered Post Filter 0 –0.2 C = 47µF PEAK ERROR (%) –0.4 –0.6 C = 22µF C = 10µF C = 4.7µF C = 2.2µF C =1µF C = 0.47µF C = 0.22µF C = 0.1µF C = 0.047µF –0.8 –1.0 –1.2 –1.4 –1.6 –1.8 –2.
PAGE 18
LTC1968 U W U U APPLICATIO S I FOR ATIO SETTLING ACCURACY (%) 10 C = 0.22µF C = 0.47µF C = 1µF C = 2.2µF C = 4.7µF C = 10µF C = 22µF C = 47µF C = 100µF C = 220µF C = 470µF 1 0.1 0.01 0.1 1 SETTLING TIME (SEC) 10 100 1968 F18 Figure 18. Settling Time with Buffered Post Filter SETTLING ACCURACY (%) 10 C = 470µF C = 0.1µF C = 0.22µF C = 0.47µF C = 1µF C = 2.2µF C = 4.7µF C = 10µF C = 22µF C = 47µF C = 100µF C = 220µF 1 0.1 0.01 0.
PAGE 19
LTC1968 U W U U APPLICATIO S I FOR ATIO waveform dynamics and the type of filtering used. The above method is conservative for some cases and about right for others. The LTC1968 works well with signals whose crest factor is 4 or less. At higher crest factors, the internal ∆Σ modulator will saturate, and results will vary depending on the exact frequency, shape and (to a lesser extent) amplitude of the input waveform. The output voltage could be higher or lower than the actual RMS of the input signal.
PAGE 20
LTC1968 U W U U APPLICATIO S I FOR ATIO VOUT = (√(5mV AC)2 + (0.4mV DC)2) • 1.001 + 0.2mV = 5.221mV = 5mV + 4.42% As can be seen, the gain term dominates with large inputs, while the offset terms become significant with smaller inputs. In fact, 5mV is the minimum RMS level needed to keep the LTC1968 calculation core functioning normally, so this represents the worst-case of usable input levels.
PAGE 21
LTC1968 U W U U APPLICATIO S I FOR ATIO This allows each sample to settle to within 46ppm and it is these samples that are used to compute the RMS value. This is a much higher accuracy than the LTC1968 conversion limits, and far better than the accuracy computed via the simplistic resistive divider model: Output Impedance The LTC1968 output impedance during operation is similarly due to a switched capacitor action. In this case, 20pF of on-chip capacitance operating at 2MHz translates into 25kΩ.
PAGE 22
LTC1968 U W U U APPLICATIO S I FOR ATIO LTC1968 OUTPUT OUT RTN 7106 TYPE 5 31 6 CAVE 30 IN HI IN LO 1968 F21a Figure 21a. Interfacing to DVM/DPM ADC LTC1968 OUTPUT OUT RTN LTC2420 5 6 3 CAVE 4 VIN SDO GND SCK CS 1968 F21b SERIAL DATA DIGITALLY CORRECT LOADING ERRORS Figure 21b. Interfacing to LTC2420 not zero at 0V, but rather at one half its reference, so both an output offset and a gain error will result.
PAGE 23
LTC1968 U W U U APPLICATIO S I FOR ATIO The trade-off here is that on the one hand, the DC error is input frequency dependent, so a calibration signal frequency high enough to make the DC error negligible should be used. On the other hand, as low a frequency as can be used is best to avoid attenuation of the calibrated AC signal, either from parasitic RC loading or insufficient op amp gain.
PAGE 24
LTC1968 U W U U APPLICATIO S I FOR ATIO TROUBLESHOOTING GUIDE Top Ten LTC1968 Application Mistakes 1. Circuit won’t work–Dead On Arrival–no power drawn. – Probably forgot to enable the LTC1968 by pulling Pin 8 low. 4. Gain is low by a few percent, along with other screwy results. – Probably tried to use output in a floating, differential manner. Solution: Tie Pin 6 to a low impedance. See “Output Connections” in the Design Cookbook. Solution: Tie Pin 8 to Pin 1. GROUND PIN 6 2.
PAGE 25
LTC1968 U W U U APPLICATIO S I FOR ATIO 7. Output is noisy with >200kHz inputs. – This is a fundamental characteristic of this topology. The LTC1968 is designed to work very well with inputs of 100kHz or less. It works okay as high as 1MHz, but it is limited by aliased ∆Σ noise. Solution: Bandwidth limit the input or digitally filter the resulting output. 8. Large errors occur at crest factors approaching, but less than 4. – Insufficient averaging. Solution: Increase CAVE.
PAGE 26
LTC1968 W W SI PLIFIED SCHE ATIC V+ C12 GND C1 ∫ Y1 ∫ Y2 C2 IN1 2nd ORDER ∆Σ MODULATOR IN2 C3 C5 C7 + C9 + A1 – C4 OUTPUT C8 CAVE C11 A2 – OUT RTN 1968 SS C6 C10 CLOSED DURING SHUTDOWN EN TO BIAS CONTROL 50k BLEED RESISTOR FOR CAVE U TYPICAL APPLICATIO S Single Supply RMS Current Measurement 5V Single Supply, Differential, AC-Coupled RMS-to-DC Converter V+ 5V V+ LTC1968 AC INPUTS (1VPEAK DIFFERENTIAL) IN1 VOUT IN2 OUT RTN CC 1µF GND CAVE 10µF DC OUTPUT AC CURRENT 75A MA
PAGE 27
LTC1968 U TYPICAL APPLICATIO S ±2.5V Supplies, Single Ended, DC-Coupled RMS-to-DC Converter with Shutdown 0.1µF X7R 2.5V ≥2V OFF ON 2.5V VOLTAGE NOISE IN –2.5V ≤–2V EN DC + AC INPUT (1VPEAK) RMS Noise Measurement 2.5V V+ 100Ω LTC1968 IN1 V+ + VOUT CAVE 10µF IN2 OUT RTN LTC1968 1k 1/2 LTC6203 GND –2.5V 100Ω –2.5V EN 0.1µF 100k 1mVDC 1µVRMS OF INPUT NOISE CAVE 10µF IN2 OUT RTN GND 1968 TA04 VOUT IN1 – DC OUTPUT VOUT = 1968 TA05 –2.
PAGE 28
LTC1968 U TYPICAL APPLICATIO Audio Amplitude Compressor R5 5.9k ATTENUATE BY 1/4 V+ LT1256 R2 1k VIN R1 100k C2 0.47µF R3 7.5k 2 – 1 + 9 A1 R4 2.49k C1 47nF 14 7 A2 13 – ATTENUATION CONTROL R9 10k R6 2k VOUT + GAIN OF 4 R8 15k R15 47Ω 8 V– V + VC RC 3 5 RFS 10 VFS R13 3.3k 12 C3 0.1µF R7 5.9k V+ R14 3.3k V+ – + V– VDD R10 200k LT1636 C5 0.22µF C4 1µF LTC1968 IN1 VOUT OUT RTN IN2 R12 1k 0.