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LTC2376-18

237618f

TYPICAL APPLICATION

FEATURES DESCRIPTION

18-Bit, 250ksps, Low Power

SAR ADC with 102dB SNR

The LTC

2376-18 is a low noise, low power, high speed

18-bit successive approximation register (SAR) ADC.

Operating from a 2.5V supply, the LTC2376-18 has a

±V

REF

fully differential input range with V

REF

ranging from

2.5V to 5.1V. The LTC2376-18 consumes only 3.4mW and

achieves ±1.75LSB INL maximum, no missing codes at

18 bits with 102dB SNR.

The LTC2376-18 has a high speed SPI-compatible se-

rial interface that supports 1.8V, 2.5V, 3.3V and 5V logic

while also featuring a daisy-chain mode. The fast 250ksps

throughput with no cycle latency makes the LTC2376-18

ideally suited for a wide variety of high speed applications.

An internal oscillator sets the conversion time, easing exter-

nal timing considerations. The LTC2376-18 automatically

powers down between conversions, leading to reduced

power dissipation that scales with the sampling rate.

The LTC2376-18 features a unique digital gain compres-

sion (DGC) function, which eliminates the driver amplifier’s

negative supply while preserving the full resolution of the

ADC. When enabled, the ADC performs a digital scaling

function that maps zero-scale code from 0V to 0.1 • V

REF

and full-scale code from V

REF

to 0.9 • V

REF

. For a typical

reference voltage of 5V, the full-scale input range is now

0.5V to 4.5V, which provides adequate headroom for

powering the driving amplifier from a single 5.5V supply.

32k Point FFT f

= 250ksps, f

= 2kHz

APPLICATIONS

250ksps Throughput Rate

±1.75LSB INL (Max)

Guaranteed 18-Bit No Missing Codes

Low Power: 3.4mW at 250ksps, 3.4μW at 250sps

102dB SNR (Typ) at f

= 2kHz

–126dB THD (Typ) at f

= 2kHz

Digital Gain Compression (DGC)

Guaranteed Operation to 125°C

2.5V Supply

Fully Differential Input Range ±V

REF

Input Range from 2.5V to 5.1V

No Pipeline Delay, No Cycle Latency

1.8V to 5V I/O Voltages

SPI-Compatible Serial I/O with Daisy-Chain Mode

Internal Conversion Clock

16-Lead MSOP and 4mm × 3mm DFN Packages

Medical Imaging

High Speed Data Acquisition

Portable or Compact Instrumentation

Industrial Process Control

Low Power Battery-Operated Instrumentation

ATE

FREQUENCY (kHz)

0 255075 125100

–180

AMPLITUDE (dBFS)

–60

–40

–20

–80

–100

–120

–140

–160

237618 TA02

SNR = 102.3dB

THD = –126dB

SINAD = 102.2dB

SFDR = 127dB

20

REF

20

3300pF

6800pF

–

REF

SAMPLE CLOCK

237618 TA01

10µF 0.1µF

2.5V

REF

1.8V TO 5V

2.5V TO 5.1V

47µF

(X5R, 0805 SIZE)

REF GND

CHAIN

RDL/SDI

SDO

SCK

BUSY

CNV

REF/DGC

LTC2376-18

–

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners.

Summary of content (24 pages)

PAGE 1
LTC2376-18 18-Bit, 250ksps, Low Power SAR ADC with 102dB SNR DESCRIPTION FEATURES n n n n n n n n n n n n n n n n 250ksps Throughput Rate ±1.75LSB INL (Max) Guaranteed 18-Bit No Missing Codes Low Power: 3.4mW at 250ksps, 3.4μW at 250sps 102dB SNR (Typ) at fIN = 2kHz –126dB THD (Typ) at fIN = 2kHz Digital Gain Compression (DGC) Guaranteed Operation to 125°C 2.5V Supply Fully Differential Input Range ±VREF VREF Input Range from 2.5V to 5.1V No Pipeline Delay, No Cycle Latency 1.
PAGE 2
LTC2376-18 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage (VDD) ...............................................2.8V Supply Voltage (OVDD) ................................................6V Reference Input (REF).................................................6V Analog Input Voltage (Note 3) IN+, IN– ......................... (GND –0.3V) to (REF + 0.3V) REF/DGC Input (Note 3) .... (GND –0.3V) to (REF + 0.3V) Digital Input Voltage (Note 3) ........................... (GND –0.3V) to (OVDD + 0.
PAGE 3
LTC2376-18 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS VIN+ Absolute Input Range (IN+) MIN (Note 5) l VIN – Absolute Input Range (IN–) (Note 5) VIN+ – VIN– Input Differential Voltage Range VIN = VIN+ – VIN– VCM TYP MAX UNITS –0.05 VREF + 0.05 l –0.05 VREF + 0.05 V l –VREF +VREF V Common-Mode Input Range l VREF/2– 0.
PAGE 4
LTC2376-18 REFERENCE INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS VREF Reference Voltage (Note 5) l MIN IREF Reference Input Current (Note 9) l VIHDGC High Level Input Voltage REF/DGC Pin l VILDGC Low Level Input Voltage REF/DGC Pin l TYP 2.5 0.16 MAX UNITS 5.1 V 0.2 mA 0.8VREF V 0.
PAGE 5
LTC2376-18 ADC TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS tSCK SCK Period (Notes 11, 12) tSCKH MIN TYP MAX UNITS l 10 ns SCK High Time l 4 ns tSCKL SCK Low Time l 4 ns tSSDISCK SDI Setup Time From SCK↑ (Note 11) l 4 ns tHSDISCK SDI Hold Time From SCK↑ (Note 11) l 1 ns 13.
PAGE 6
LTC2376-18 TYPICAL PERFORMANCE CHARACTERISTICS REF = 5V, fSMPL = 250ksps, unless otherwise noted. Integral Nonlinearity vs Output Code Differential Nonlinearity vs Output Code 1.5 1.0 DC Histogram 0.5 80000 0.4 70000 0.3 0.5 0.0 –0.5 60000 0.1 0.0 –0.1 10000 0 –0.
PAGE 7
LTC2376-18 TYPICAL PERFORMANCE CHARACTERISTICS REF = 5V, fSMPL = 250ksps, unless otherwise noted. SNR, SINAD vs Temperature, fIN = 2kHz TA = 25°C, VDD = 2.5V, OVDD = 2.5V, VCM = 2.5V, THD, Harmonics vs Temperature, fIN = 2kHz 105.0 INL/DNL vs Temperature –115 1.0 104.5 103.5 103.0 –120 SINAD 102.5 102.0 101.5 INL/DNL ERROR (LSB) SNR HARMONICS, THD (dBFS) SNR, SINAD (dBFS) 104.0 THD –125 3RD –130 2ND 101.0 0.5 MAX INL MAX DNL 0 MIN DNL MIN INL –0.5 –135 100.5 100.
PAGE 8
LTC2376-18 PIN FUNCTIONS CHAIN (Pin 1): Chain Mode Selector Pin. When low, the LTC2376-18 operates in normal mode and the RDL/SDI input pin functions to enable or disable SDO. When high, the LTC2376-18 operates in chain mode and the RDL/SDI pin functions as SDI, the daisy-chain serial data input. Logic levels are determined by 0VDD. BUSY (Pin 11): BUSY Indicator. Goes high at the start of a new conversion and returns low when the conversion has finished. Logic levels are determined by 0VDD.
PAGE 9
LTC2376-18 TIMING DIAGRAM Conversion Timing Using the Serial Interface CHAIN, RDL/SDI = 0 CNV CONVERT POWER-DOWN BUSY HOLD ACQUIRE SCK D17 D16 D15 SDO D2 D1 D0 237618 TD01 237618f 9
PAGE 10
LTC2376-18 APPLICATIONS INFORMATION TRANSFER FUNCTION The LTC2376-18 is a low noise, low power, high speed 18-bit successive approximation register (SAR) ADC. Operating from a single 2.5V supply, the LTC2376-18 supports a large and flexible ±VREF fully differential input range with VREF ranging from 2.5V to 5.1V, making it ideal for high performance applications which require a wide dynamic range. The LTC2376-18 achieves ±1.75LSB INL max, no missing codes at 18 bits and 102dB SNR.
PAGE 11
LTC2376-18 APPLICATIONS INFORMATION INPUT DRIVE CIRCUITS A low impedance source can directly drive the high impedance inputs of the LTC2376-18 without gain error. A high impedance source should be buffered to minimize settling time during acquisition and to optimize the distortion performance of the ADC. Minimizing settling time is important even for DC inputs, because the ADC inputs draw a current spike when entering acquisition.
PAGE 12
LTC2376-18 APPLICATIONS INFORMATION LT6350 5V 8 0V 1 + – RINT 2 + – OUT1 RINT 0V – + 5V 5 OUT2 0V –40 5V 4 10μF R4 = 402Ω R3 = 2k 8 + – RINT 10V 0V –10V RIN = 2k RINT 2 R1 = 499Ω OUT1 + – 0V 5V – + 5 OUT2 0V VCM = VREF/2 220pF 237618 F06a Figure 6a. LT6350 Converting a ±10V Single-Ended Signal to a ±5V Differential Input Signal SNR = 101dB THD = –108.1dB SINAD = 100.4dB SFDR = 108.5dB –20 LT6350 1 Figure 5a.
PAGE 13
LTC2376-18 APPLICATIONS INFORMATION many applications. With its small size, low power and high accuracy, the LTC6655-5 is particularly well suited for use with the LTC2376-18. The LTC6655-5 offers 0.025% (max) initial accuracy and 2ppm/°C (max) temperature coefficient for high precision applications. The LTC6655-5 is fully specified over the H-grade temperature range and complements the extended temperature operation of the LTC2376-18 up to 125°C.
PAGE 14
LTC2376-18 APPLICATIONS INFORMATION 0μA to a maximum of 0.2mA at 250ksps. This step in DC current draw triggers a transient response in the reference that must be considered since any deviation in the reference output voltage will affect the accuracy of the output code. In applications where the transient response of the reference is important, the fast settling LTC6655-5 reference is also recommended.
PAGE 15
LTC2376-18 APPLICATIONS INFORMATION TIMING AND CONTROL DIGITAL INTERFACE CNV Timing The LTC2376-18 has a serial digital interface. The flexible OVDD supply allows the LTC2376-18 to communicate with any digital logic operating between 1.8V and 5V, including 2.5V and 3.3V systems. Acquisition A proprietary sampling architecture allows the LTC2376-18 to begin acquiring the input signal for the next conversion 527ns after the start of the current conversion. This extends the acquisition time to 3.
PAGE 16
LTC2376-18 TIMING DIAGRAMS Normal Mode, Single Device Figure 13 shows a single LTC2376-18 operated in normal mode with CHAIN and RDL/SDI tied to ground. With RDL/ SDI grounded, SDO is enabled and the MSB(D17) of the new conversion data is available at the falling edge of BUSY. This is the simplest way to operate the LTC2376-18. When CHAIN = 0, the LTC2376-18 operates in normal mode. In normal mode, RDL/SDI enables or disables the serial data output pin SDO. If RDL/SDI is high, SDO is in high impedance.
PAGE 17
LTC2376-18 TIMING DIAGRAMS Normal Mode, Multiple Devices Since SDO is shared, the RDL/SDI input of each ADC must be used to allow only one LTC2376-18 to drive SDO at a time in order to avoid bus conflicts. As shown in Figure 14, the RDL/SDI inputs idle high and are individually brought low to read data out of each device between conversions. When RDL/SDI is brought low, the MSB of the selected device is output onto SDO.
PAGE 18
LTC2376-18 TIMING DIAGRAMS Chain Mode, Multiple Devices This is useful for applications where hardware constraints may limit the number of lines needed to interface to a large number of converters. Figure 15 shows an example with two daisy-chained devices. The MSB of converter A will appear at SDO of converter B after 18 SCK cycles. The MSB of converter A is clocked in at the SDI/RDL pin of converter B on the rising edge of the first SCK. When CHAIN = OVDD, the LTC2376-18 operates in chain mode.
PAGE 19
LTC2376-18 BOARD LAYOUT To obtain the best performance from the LTC2376-18 a printed circuit board is recommended. Layout for the printed circuit board (PCB) should ensure the digital and analog signal lines are separated as much as possible. In particular, care should be taken not to run any digital clocks or signals alongside analog signals or underneath the ADC. Recommended Layout The following is an example of a recommended PCB layout. A single solid ground plane is used.
PAGE 20
LTC2376-18 BOARD LAYOUT Partial Layer 1 Component Side Partial Layer 2 Ground Plane 237618f 20
PAGE 21
LTC2376-18 BOARD LAYOUT Partial Layer 3 PWR Plane Partial Layer 4 Bottom Layer 237618f 21
PAGE 22
AIN – J8 E7 EXT VREF/2 R14 0Ω R39 0Ω JP5 HD1X3-100 EXT_CM AIN+ J4 COUPLING AC DC 3 2 1 C8 1μF +2.5V COUPLING AC DC C46 1μF C47 OPT C48 10μF 6.3V 5 4 +3.3V C1 0.1μF 2 5 4 +3.3V C2 0.1μF R3 CLK 33Ω TO CPLD R41 OPT R40 1k R18 1k R9 OPT C49 OPT 3 V+ C43 0.1μF C55 1μF 6 C45 V – 10μF 2 +IN2 8 +IN1 V– C63 10μF 6.3V C62 1μF R37 OPT R34 0Ω C61 10μF 6.3V C42 15pF R32 0Ω V+ C44 1μF C57 0.
PAGE 23
LTC2376-18 PACKAGE DESCRIPTION DE Package 16-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1732 Rev Ø) R = 0.115 TYP 4.00 ±0.10 (2 SIDES) 0.70 ±0.05 2.20 ±0.05 3.30 ±0.10 3.00 ±0.10 (2 SIDES) PACKAGE OUTLINE PIN 1 TOP MARK (SEE NOTE 6) 1.70 ± 0.05 16 R = 0.05 TYP 3.30 ±0.05 3.60 ±0.05 0.40 ± 0.10 9 1.70 ± 0.10 PIN 1 NOTCH R = 0.20 OR 0.35 s 45° CHAMFER (DE16) DFN 0806 REV Ø 8 0.75 ±0.05 0.200 REF 0.25 ± 0.05 0.45 BSC 3.15 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD 3.
PAGE 24
LTC2376-18 TYPICAL APPLICATION LT6350 Configured to Accept a ±10V Input Signal While Running Off of a Single 5.5V Supply When Digital Gain Compression Is Enabled in the LTC2376-18 5.5V VIN LTC6655-5 VOUT_F 5V VOUT_S 1k 47μF VCM 10μF 4.5V 1k LT6350 V+ 6.04k 4 8 4.32k 10μF + – RIN = 15k OUT1 6800pF 0.5V IN+ 20Ω RINT RINT 2 – + IN– 20Ω 5 V– 3.01k OUT2 4.5V 6 VCM REF VDD LTC2376-18 3300pF 1 10V 0V –10V 2.5V 3 6800pF REF/DGC 237618 TA03 0.