Datasheet

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LTC2383-16

238316f

TYPICAL APPLICATION

FEATURES DESCRIPTION

16-Bit, 1Msps, Low Power

SAR ADC with Serial Interface

The LTC

2383-16 is a low noise, low power, high speed

16-bit successive approximation register (SAR) ADC.

Operating from a 2.5V supply, the LTC2383-16 has a

±2.5V fully differential input range. The LTC2383-16

consumes only 13mW and achieves ±2LSB INL max, no

missing codes at 16-bits and 92dB SNR.

The LTC2383-16 has a high speed SPI-compatible serial

interface that supports 1.8V, 2.5V, 3.3V and 5V logic

while also featuring a daisychain mode. The fast 1Msps

throughput with no cycle latency makes the LTC2383-16

ideally suited for a wide variety of high speed applica-

tions. An internal oscillator sets the conversion time,

easing external timing considerations. The LTC2383-16

automatically powers down between conversions, lead-

ing to reduced power dissipation that scales with the

sampling rate.

32k Point FFT f

= 1Msps, f

= 20kHz

APPLICATIONS

1Msps Throughput Rate

±2LSB INL (Max)

Guaranteed 16-Bit No Missing Codes

Low Power: 13mW at 1Msps, 13μW at 1ksps

92dB SNR (typ) at f

= 20kHz

Guaranteed Operation to 125°C

2.5V Supply

Fully Differential Input Range ±2.5V

External 2.5V Reference Input

No Pipeline Delay, No Cycle Latency

1.8V to 5V I/O Voltages

SPI-Compatible Serial I/O with Daisy-Chain Mode

Internal Conversion Clock

16-pin MSOP and 4mm × 3mm DFN Packages

Medical Imaging

High Speed Data Acquisition

Portable or Compact Instrumentation

Industrial Process Control

Low Power Battery-Operated Instrumentation

ATE

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

FREQUENCY (kHz)

0 100 200 300 400 500

–180

AMPLITUDE (dBFS)

–60

–40

–20

–80

–100

–120

–140

–160

238316 TA02

SNR = 92.2dB

THD = –106.2dB

SINAD = 92dB

SFDR = 110.4dB

LT6350

ANALOG INPUT

0V TO 2.5V

SINGLE-ENDED-

TO-DIFFERENTIAL

DRIVER

50 100

100

50

3300pF

10µF 0.1µF

2.5V

REF GND

1.8V TO 5V

SAMPLE CLOCK

CHAIN

RDL/SDI

SDO

SCK

BUSY

CNV

LTC2383-16

–

2.5V

47µF

(X5R, 0805 SIZE)

23816 TA01

LTC238X-16 SAR ADC Family

PART NUMBER RESOLUTION SPEED POWER

LTC2383-16 16 1Msps 13mW

LTC2382-16 16 500ksps 6.5mW

LTC2381-16 16 250ksps 3.25mW

Summary of content (24 pages)

PAGE 1
LTC2383-16 16-Bit, 1Msps, Low Power SAR ADC with Serial Interface FEATURES DESCRIPTION n The LTC®2383-16 is a low noise, low power, high speed 16-bit successive approximation register (SAR) ADC. Operating from a 2.5V supply, the LTC2383-16 has a ±2.5V fully differential input range. The LTC2383-16 consumes only 13mW and achieves ±2LSB INL max, no missing codes at 16-bits and 92dB SNR.
PAGE 2
LTC2383-16 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage (VDD) ...............................................2.8V Supply Voltage (OVDD) ................................................6V Reference Input (REF)..............................................2.8V Analog Input Voltage (Note 3) IN+, IN– ......................... (GND –0.3V) to (REF + 0.3V) Digital Input Voltage (Note 3)........................... (GND –0.3V) to (OVDD + 0.3V) Digital Output Voltage (Note 3)...........................
PAGE 3
LTC2383-16 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS VIN+ Absolute Input Range (IN+) MIN (Note 5) l VIN – Absolute Input Range (IN–) (Note 5) l VIN+ – VIN– Input Differential Voltage range VIN = VIN+ – VIN– l VCM Common-Mode Input Range l VREF/2– 0.
PAGE 4
LTC2383-16 REFERENCE INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS VREF Reference Voltage (Note 5) l MIN IREF Load Current (Note 9) l TYP 2.4 MAX UNITS 2.6 V 910 μA DIGITAL INPUTS AND DIGITAL OUTPUTS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
PAGE 5
LTC2383-16 ADC TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER tSCKL SCK Low Time CONDITIONS tSSDISCK SDI Setup Time From SCK ↑ tHSDISCK tSCKCH MIN TYP MAX UNITS l 4 ns (Note 11) l 4 ns SDI Hold Time From SCK ↑ (Note 11) l 1 ns SCK Period in Chain Mode tSCKCH = tSSDISCK + tDSDO (Note 11) l 13.
PAGE 6
LTC2383-16 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VDD = 2.5V, OVDD = 2.5V, REF = 2.5V, fSMPL = 1Msps, unless otherwise noted. Integral Nonlinearity vs Output Code Differential Nonlinearity vs Output Code DC Histogram 1600000 1.0 2.0 1400000 1.5 DNL ERROR (LSB) 0.5 0.0 –0.5 1000000 COUNTS INL ERROR (LSB) 1200000 0.5 1.0 0.0 600000 400000 –1.0 –0.5 200000 –1.5 –2.0 0 32766 –1.
PAGE 7
LTC2383-16 TYPICAL PERFORMANCE CHARACTERISTICS fSMPL = 1Msps, unless otherwise noted. INL/DNL vs Temperature Full-Scale Error vs Temperature FULL-SCALE ERROR (LSB) MAX INL INL/DNL ERROR (LSB) Offset Error vs Temperature 0.3 2.5 0.5 MAX DNL 0 MIN DNL –0.5 MIN INL –1 –55 –35 –15 2.0 –FS 1.5 +FS 1.
PAGE 8
LTC2383-16 PIN FUNCTIONS CHAIN (Pin 1): Chain Mode Selector Pin. When low, the LTC2383-16 operates in Normal Mode and the RDL/SDI input pin functions to enable or disable SDO. When high, the LTC2383-16 operates in Chain Mode and the RDL/SDI pin functions as SDI, the daisychain serial data input. RDL/SDI (Pin 12): When CHAIN is low, the part is in Normal Mode and the pin is treated as a bus enabling input.
PAGE 9
LTC2383-16 TIMING DIAGRAM Conversion Timing Using the Serial Interface CHAIN, RDL/SDI = 0 POWER-UP POWER-DOWN CNV ACQUIRE BUSY CONVERT SCK D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 SDO 238316 TD02 238316f 9
PAGE 10
LTC2383-16 OVERVIEW The LTC2383-16 is a low noise, low power, high speed 16-bit successive approximation register (SAR) ADC. Operating from a single 2.5V supply, the LTC2383-16 supports a large ±2.5V fully differential input range, making it ideal for high performance applications which require a wide dynamic range. The LTC2383-16 achieves ±2LSB INL max, no missing codes at 16-bits and 92dB SNR.
PAGE 11
LTC2383-16 APPLICATIONS INFORMATION For best performance, a buffer amplifier should be used to drive the analog inputs of the LTC2383-16. The amplifier provides low output impedance, which produces fast settling of the analog signal during the acquisition phase. It also provides isolation between the signal source and the current spike the ADC inputs draw. Input Filtering The noise and distortion of the buffer amplifier and signal source must be considered since they add to the ADC noise and distortion.
PAGE 12
LTC2383-16 APPLICATIONS INFORMATION The LT6350 can also be used to buffer and convert singleended signals larger than the input range of the LTC2383-16 in order to maximize the signal swing that can be digitized. Figure 6 shows the LT6350 converting a 0V-5V single-ended input signal to the ±2.5V differential input range of the LTC2383-16. In this case, the first amplifier in the LT6350 is configured as an inverting amplifier stage, which acts to attenuate the input signal down to the 0V-2.
PAGE 13
LTC2383-16 APPLICATIONS INFORMATION Table 2. SNR, THD vs RIN for ±10V Single-Ended Input Signal. RIN (Ω) R1 (Ω) R2 (Ω) R3 (Ω) R4 (Ω) SNR (dB) THD (dB) 10k 1.24k 1.24k 10k 1.1k 92 –96 50k 6.19k 6.19k 50k 5.49k 91 –96 100k 12.4k 12.4k 100k 11k 91 –96 ADC REFERENCE The LTC2383-16 requires an external reference to define its input range. A low noise, low temperature drift reference is critical to achieving the full datasheet performance of the ADC.
PAGE 14
LTC2383-16 APPLICATIONS INFORMATION Signal-to-Noise and Distortion Ratio (SINAD) The signal-to-noise and distortion ratio (SINAD) is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the A/D output. The output is band-limited to frequencies from above DC and below half the sampling frequency. Figure 10 shows that the LTC2383-16 achieves a typical SINAD of 92dB at a 1MHz sampling rate with a 20kHz input. 0 SNR = 92.
PAGE 15
LTC2383-16 APPLICATIONS INFORMATION Internal Conversion Clock DIGITAL INTERFACE The LTC2383-16 has an internal clock that is trimmed to achieve a maximum conversion time of 730ns. With a minimum acquisition time of 250ns, throughput performance of 1Msps is guaranteed without any external adjustments. The LTC2383-16 has a serial digital interface. The flexible OVDD supply allows the LTC2383-16 to communicate with any digital logic operating between 1.8V and 5V, including 2.5V and 3.3V systems.
PAGE 16
LTC2383-16 TIMING DIAGRAM Normal Mode, Single Device Figure 12 shows a single LTC2383-16 operated in Normal Mode with CHAIN and RDL/SDI tied to ground. With RDL/ SDI grounded, SDO is enabled and the MSB(D15) of the new conversion data is available at the falling edge of BUSY. This is the simplest way to operate the LTC2383-16. When CHAIN = 0, the LTC2383-16 operates in Normal mode. In Normal mode, RDL/SDI enables or disables the serial data output pin SDO. If RDL/SDI is high, SDO is in high-impedance.
PAGE 17
LTC2383-16 TIMING DIAGRAM Normal Mode, Multiple Devices time in order to avoid bus conflicts. As shown in Figure 13, the RDL/SDI inputs idle high and are individually brought low to read data out of each device between conversions. When RDL/SDI is brought low, the MSB of the selected device is output onto SDO. To ensure the MSB is properly output and captured, SCK must be held low at least 1ns before and 16ns after bringing RDL/SDI low.
PAGE 18
LTC2383-16 TIMING DIAGRAM When CHAIN = OVDD, the LTC2383-16 operates in Chain Mode. In Chain Mode, SDO is always enabled and RDL/SDI serves as the serial data input pin (SDI) where daisychain data output from another ADC can be input. This is useful for applications where hardware constraints may limit the number of lines needed to interface to a large number of converters. Figure 14 shows an example with two daisy chained devices.
PAGE 19
LTC2383-16 BOARD LAYOUT To obtain the best performance from the LTC2383-16 a printed circuit board is recommended. Layout for the printed circuit board (PCB) should ensure the digital and analog signal lines are separated as much as possible. In particular, care should be taken not to run any digital clocks or signals alongside analog signals or underneath the ADC. Recommended Layout The following is an example of a recommended PCB layout. A single solid ground plane is used.
PAGE 20
LTC2383-16 BOARD LAYOUT Partial Layer 1 Component Side 238316 BL02 Partial Layer 2 Ground Plane 238316 BL03 238316f 20
PAGE 21
LTC2383-16 BOARD LAYOUT Partial Layer 3 PWR Plane 238316 BL04 Partial Layer 4 Bottom Layer 238316 BL05 238316f 21
PAGE 22
AIN – E7 VREF/2 EXT R39 ØΩ JP5 HD1X3-100 EXT_CM AIN+ R14 Ø +2.5V 3 2 1 COUPLING AC DC C46 1μF COUPLING AC DC C8 1μF C47 OPT C48 10μF 6.3V 4 2 5 4 +3.3V C2 0.1μF R3 CLK 33Ω TO CPLD R41 OPT R40 1k R18 1k R9 1k C49 OPT C63 10μF 6.3V 3 V+ C43 1μF C55 1μF 6 C45 V – 10μF 2 +IN2 8 +IN1 V– C62 10μF R37 1k R34 ØΩ C61 10μF 6.3V C42 15pF R32 ØΩ V+ C44 1μF C57 0.
PAGE 23
LTC2383-16 PACKAGE DESCRIPTION DE Package 16-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1732 Rev Ø) R = 0.115 TYP 4.00 ±0.10 (2 SIDES) 0.70 ±0.05 2.20 ±0.05 3.30 ±0.10 3.00 ±0.10 (2 SIDES) PACKAGE OUTLINE PIN 1 TOP MARK (SEE NOTE 6) 1.70 ± 0.05 16 R = 0.05 TYP 3.30 ±0.05 3.60 ±0.05 0.40 ± 0.10 9 1.70 ± 0.10 PIN 1 NOTCH R = 0.20 OR 0.35 s 45° CHAMFER (DE16) DFN 0806 REV Ø 8 0.75 ±0.05 0.200 REF 0.25 ± 0.05 0.45 BSC 3.15 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD 3.
PAGE 24
LTC2383-16 TYPICAL APPLICATION ADC Driver: Single-Ended Input to Differential Output with Filter 0 SNR = 92.2dB THD = –106.2dB SINAD = 92dB SFDR = 110.