Datasheet

ManualsBrandsLinear Technology ManualsADC - Analog to DigitalA/D Converter IC 24bit SOIC-

LTC2400

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

24-Bit µPower

No Latency ∆Σ

ADC in SO-8

■

Weight Scales

■

Direct Temperature Measurement

■

Gas Analyzers

■

Strain-Gage Transducers

■

Instrumentation

■

Data Acquisition

■

Industrial Process Control

■

6-Digit DVMs

Total Unadjusted Error vs Output Code

■

24-Bit ADC in SO-8 Package

■

4ppm INL, No Missing Codes

■

4ppm Full-Scale Error

■

Single Conversion Settling Time

for Multiplexed Applications

■

0.5ppm Offset

■

0.3ppm Noise

■

Internal Oscillator—No External Components

Required

■

110dB Min, 50Hz/60Hz Notch Filter

■

Reference Input Voltage: 0.1V to V

■

Live Zero—Extended Input Range Accommodates

12.5% Overrange and Underrange

■

Single Supply 2.7V to 5.5V Operation

■

Low Supply Current (200µA) and Auto Shutdown

The LTC

2400 is a 2.7V to 5.5V micropower 24-bit

converter with an integrated oscillator, 4ppm INL and

0.3ppm RMS noise. It uses delta-sigma technology and

provides single cycle settling time for multiplexed appli-

cations. Through a single pin the LTC2400 can be config-

ured for better than 110dB rejection at 50Hz or 60Hz ±2%,

or it can be driven by an external oscillator for a user

defined rejection frequency in the range 1Hz to 120Hz.

The internal oscillator requires no external frequency

setting components.

The converter accepts any external reference voltage from

0.1V to V

. With its extended input conversion range of

–12.5% V

REF

to 112.5% V

REF

, the LTC2400 smoothly

resolves the offset and overrange problems of preceding

sensors or signal conditioning circuits.

The LTC2400 communicates through a flexible 3-wire

digital interface which is compatible with SPI and

MICROWIRE

protocols.

REF

SCK

SDO

GND CS

REFERENCE

VOLTAGE

0.1V TO V

ANALOG

INPUT RANGE

–0.12V

REF

TO 1.12V

REF

= INTERNAL OSC/50Hz REJECTION

= EXTERNAL CLOCK SOURCE

= INTERNAL OSC/60Hz REJECTION

3-WIRE

SPI INTERFACE

1µF

2.7V TO 5.5V

LTC2400

2400 TA01

OUTPUT CODE (DECIMAL)

0 8,338,608 16,777,215

LINEARITY ERROR (ppm)

2400 TA02

–2

–4

–6

–8

–10

= 5V

REF

= 5V

= 25°C

= LOW

, LTC and LT are registered trademarks of Linear Technology Corporation.

No Latency ∆Σ is a trademark of Linear Technology Corporation.

MICROWIRE is a trademark of National Semiconductor Corporation.

Summary of content (41 pages)

PAGE 1
LTC2400 24-Bit µPower No Latency ∆Σ ADC in SO-8 TM U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO 24-Bit ADC in SO-8 Package 4ppm INL, No Missing Codes 4ppm Full-Scale Error Single Conversion Settling Time for Multiplexed Applications 0.5ppm Offset 0.3ppm Noise Internal Oscillator—No External Components Required 110dB Min, 50Hz/60Hz Notch Filter Reference Input Voltage: 0.1V to VCC Live Zero—Extended Input Range Accommodates 12.5% Overrange and Underrange Single Supply 2.7V to 5.
PAGE 2
LTC2400 U W W W ABSOLUTE MAXIMUM RATINGS U W U PACKAGE/ORDER INFORMATION (Notes 1, 2) Supply Voltage (VCC) to GND .......................– 0.3V to 7V Analog Input Voltage to GND ....... – 0.3V to (VCC + 0.3V) Reference Input Voltage to GND .. – 0.3V to (VCC + 0.3V) Digital Input Voltage to GND ........ – 0.3V to (VCC + 0.3V) Digital Output Voltage to GND ..... – 0.3V to (VCC + 0.3V) Operating Temperature Range LTC2400C ............................................... 0°C to 70°C LTC2400I .............
PAGE 3
LTC2400 U U DIGITAL I PUTS A D DIGITAL OUTPUTS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN VIH High Level Input Voltage CS, FO 2.7V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 3.3V ● VIL Low Level Input Voltage CS, FO 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V ● VIH High Level Input Voltage SCK 2.7V ≤ VCC ≤ 5.5V (Note 9) 2.7V ≤ VCC ≤ 3.3V (Note 9) ● VIL Low Level Input Voltage SCK 4.
PAGE 4
LTC2400 WU TI I G CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
PAGE 5
LTC2400 U W TYPICAL PERFOR A CE CHARACTERISTICS Total Unadjusted Error (3V Supply) 10 10 VCC = 3V VREF = 3V 10 VCC = 3V VREF = 3V 5 0 TA = –55°C, –45°C, 25°C, 90°C –5 TA = –55°C, –45°C, 25°C, 90°C 0 –5 –10 0.5 1.0 1.5 2.0 INPUT VOLTAGE (V) 2.5 3.0 TA = – 45°C 0.5 1.0 1.5 2.0 INPUT VOLTAGE (V) 2.5 3.0 TA = – 55°C 0 – 0.05 – 0.10 – 0.15 – 0.20 – 0.25 – 0.
PAGE 6
LTC2400 U W TYPICAL PERFOR A CE CHARACTERISTICS RMS Noise vs Reference Voltage Offset Error vs VCC 5.0 20 10 5 0 1 0 3 4 2 REFERENCE VOLTAGE (V) – 5.0 2.7 5 3.2 3.7 4.2 4.7 500 0.50 0 1.5 0 10.0 Full-Scale Error vs VCC 6 VCC = 5V VIN = VREF FULL-SCALE ERROR (ppm) 7.5 5.0 2.5 4 3 2 1 – 5.0 – 55 – 30 – 5 20 45 70 TEMPERATURE (°C) 95 120 2400 G15 6 120 5 FULL-SCALE ERROR (ppm) – 2.
PAGE 7
LTC2400 U W TYPICAL PERFOR A CE CHARACTERISTICS Sleep Current vs Temperature Conversion Current vs Temperature 220 VCC = 5.5V SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 210 VCC = 4.1V 200 190 VCC= 2.7V 180 170 0 25 –20 VCC = 2.7V, 5.5V 20 15 10 150 –55 –30 70 45 20 TEMPERATURE (°C) –5 95 45 20 70 –5 TEMPERATURE (°C) 95 PSRR vs Frequency at VCC –70 –90 –110 –130 50 100 150 200 FREQUENCY AT VCC (Hz) 250 Rejection vs Frequency at VIN VCC = 4.
PAGE 8
LTC2400 U W TYPICAL PERFOR A CE CHARACTERISTICS INL vs Output Rate VCC = 5V VREF = 5V TA = 25°C F0 = EXTERNAL 22 INL (BITS) 20 18 16 14 24 20 18 16 14 12 12 10 10 8 VCC = 5V VREF = 5V TA = 25°C FO = EXTERNAL 22 RESOLUTION (BITS)* 24 Resolution vs Output Rate *RESOLUTION = 8 0 5 10 15 20 25 30 35 40 45 50 55 60 OUTPUT RATE (Hz) 2400 G27 0 LOG(VREF/RMS NOISE) LOG (2) 5 10 15 20 25 30 35 40 45 50 55 60 OUTPUT RATE (Hz) 2400 G28 U U U PIN FUNCTIONS VCC (Pin 1): Positive Supply Voltage.
PAGE 9
LTC2400 W FU CTIO AL BLOCK DIAGRA U U INTERNAL OSCILLATOR VCC GND VIN AUTOCALIBRATION AND CONTROL ∫ ∫ FO (INT/EXT) ∫ ∑ SDO SERIAL INTERFACE ADC SCK CS VREF DECIMATING FIR DAC 2400 FD TEST CIRCUITS VCC 3.4k SDO 3.
PAGE 10
LTC2400 U W U U APPLICATIONS INFORMATION an order of magnitude. The part remains in the sleep state as long as CS is logic HIGH. The conversion result is held indefinitely in a static shift register while the converter is in the sleep state. Once CS is pulled low, the device begins outputting the conversion result. There is no latency in the conversion result. The data output corresponds to the conversion just performed.
PAGE 11
LTC2400 U W U U APPLICATIONS INFORMATION VCC + 0.3V 9/8VREF VREF 1/2VREF NORMAL INPUT RANGE EXTENDED INPUT RANGE ABSOLUTE MAXIMUM INPUT RANGE Bit 31 (first output bit) is the end of conversion (EOC) indicator. This bit is available at the SDO pin during the conversion and sleep states whenever the CS pin is LOW. This bit is HIGH during the conversion and goes LOW when the conversion is complete. Bit 30 (second output bit) is a dummy bit (DMY) and is always LOW. 0 –1/8VREF –0.3V 2400 F02 Figure 2.
PAGE 12
LTC2400 U U W U APPLICATIONS INFORMATION out on the falling edge of the 31st SCK and may be latched on the rising edge of the 32nd SCK pulse. On the falling edge of the 32nd SCK pulse, SDO goes HIGH indicating a new conversion cycle has been initiated. This bit serves as EOC (Bit 31) for the next conversion cycle. Table 2 summarizes the output data format. As long as the voltage on the VIN pin is maintained within the – 0.3V to (VCC + 0.
PAGE 13
LTC2400 U W U U APPLICATIONS INFORMATION –60 The selection of 50Hz or 60Hz rejection can also be made by driving FO to an appropriate logic level. A selection change during the sleep or data output states will not disturb the converter operation. If the selection is made during the conversion state, the result of the conversion in progress may be outside specifications but the following conversions will not be affected.
PAGE 14
LTC2400 U W U U APPLICATIONS INFORMATION SERIAL INTERFACE The LTC2400 transmits the conversion results and receives the start of conversion command through a synchronous 3-wire interface. During the conversion and sleep states, this interface can be used to assess the converter status and during the data output state it is used to read the conversion result. Serial Clock Input/Output (SCK) The serial clock signal present on SCK (Pin 7) is used to synchronize the data transfer.
PAGE 15
LTC2400 U W U U APPLICATIONS INFORMATION out the SDO pin on each falling edge of SCK. This enables external circuitry to latch the output on the rising edge of SCK. EOC can be latched on the first rising edge of SCK and the last bit of the conversion result can be latched on the 32nd rising edge of SCK. On the 32nd falling edge of SCK, the device begins a new conversion. SDO goes HIGH (EOC = 1) indicating a conversion is in progress.
PAGE 16
LTC2400 U U W U APPLICATIONS INFORMATION 2.7V TO 5.5V VCC 1µF VCC = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION FO LTC2400 VREF 0.1V TO VCC VIN –0.12VREF TO 1.12VREF VREF SCK VIN SDO GND CS CS BIT 0 SDO TEST EOC TEST EOC BIT 31 EOC BIT 30 EOC Hi-Z Hi-Z BIT 29 BIT 28 BIT 27 SIG EXR MSB Hi-Z BIT 9 TEST EOC BIT 8 Hi-Z SCK (EXTERNAL) SLEEP CONVERSION SLEEP DATA OUTPUT CONVERSION 2400 F06 DATA OUTPUT Figure 6.
PAGE 17
LTC2400 U U W U APPLICATIONS INFORMATION 2.7V TO 5.5V VCC 1µF VCC = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION FO LTC2400 VREF 0.1V TO VCC VIN –0.12VREF TO 1.12VREF VREF SCK VIN SDO GND CS CS BIT 31 SDO BIT 30 EOC BIT 29 BIT 28 BIT 27 SIG EXR MSB BIT 26 BIT 0 BIT 4 LSB24 SCK (EXTERNAL) CONVERSION SLEEP DATA OUTPUT CONVERSION 2400 F07 Figure 7. External Serial Clock, CS = 0 Operation VCC 2.7V TO 5.
PAGE 18
LTC2400 U U W U APPLICATIONS INFORMATION shifted out of the SDO pin. The data output cycle begins on this first rising edge of SCK and concludes after the 32nd rising edge. Data is shifted out the SDO pin on each falling edge of SCK. The internally generated serial clock is output to the SCK pin. This signal may be used to shift the conversion result into external circuitry. EOC can be latched on the first rising edge of SCK and the last bit of the conversion result on the 32nd rising edge of SCK.
PAGE 19
LTC2400 U W U U APPLICATIONS INFORMATION pull-up may not be adequate to return SCK to a HIGH level before CS goes low again. This is not a concern under normal conditions where CS remains LOW after detecting EOC = 0. This situation is easily overcome by adding an external 10k pull-up resistor to the SCK pin. HIGH state. This will cause the device to exit the internal serial clock mode on the next falling edge of CS.
PAGE 20
LTC2400 U W U U APPLICATIONS INFORMATION During the conversion, the SCK and the serial data output pin (SDO) are HIGH (EOC = 1). Once the conversion is complete, SCK and SDO go LOW (EOC = 0) indicating the conversion has finished and the device has entered the low power sleep state. The part remains in the sleep state a minimum amount of time (1/2 the internal SCK period) then immediately begins outputting data.
PAGE 21
LTC2400 U W U U APPLICATIONS INFORMATION 7 pin on each falling edge of SCK. The internally generated serial clock is output to the SCK pin. This signal may be used to shift the conversion result into external circuitry. After the 32nd rising edge, CS is pulled HIGH and a new conversion is immediately started. This is useful in applications requiring periodic monitoring and ultralow power. Figure 14 shows the average supply current as a function of capacitance on CS.
PAGE 22
LTC2400 U W U U APPLICATIONS INFORMATION connection resistance. The LTC2400’s power supply current flowing through the 0.01Ω resistance of the common ground pin will develop a 2.5µV offset signal. For a reference voltage VREF = 2.5V, this represents a 1ppm offset error. In an alternative configuration, the GND pin of the converter can be the single-point-ground in a single point grounding system.
PAGE 23
LTC2400 U W U U APPLICATIONS INFORMATION Input Current (VIN) If complete settling occurs on the input, conversion results will be uneffected by the dynamic input current. If the settling is incomplete, it does not degrade the linearity performance of the device. It simply results in an offset/ full-scale shift, see Figure 16. To simplify the analysis of input dynamic current, two separate cases are assumed: large capacitance at VIN (CIN > 0.01µF) and small capacitance at VIN (CIN < 0.01µF).
PAGE 24
LTC2400 U W U U APPLICATIONS INFORMATION 600 CIN = 0.01µF FULL-SCALE ERROR (ppm) –50 VCC = 5V VREF = 5V VIN = 5V TA = 25°C –100 CIN = 0.1µF –150 CIN = 1µF CIN = 10µF –200 VCC = 5V VREF = 5V VIN = 5V TA = 25°C 500 FULL-SCALE ERROR (ppm) 0 400 CVREF = 10µF 300 CVREF = 1µF 200 CVREF = 0.1µF 100 –250 CVREF = 0.01µF 0 –300 0 200 400 600 RSOURCE (Ω) 800 0 1000 2400 F22 2400 F21 Figure 21. Full-Scale Error vs RSOURCE (Large C) Figure 22. Full-Scale Error vs RVREF (Large C) VREF = 5V).
PAGE 25
LTC2400 U W U U APPLICATIONS INFORMATION 160 –20 CVREF = 0.1µF CVREF = 1µF CVREF = 10µF 100 80 60 –40 CVREF = 0.01µF 40 REJECTION (dB) 120 INL ERROR (ppm) 0 VCC = 5V VREF = 5V TA = 25°C 140 –60 –80 –100 20 –120 0 –140 –20 0 800 200 600 400 RESISTANCE AT VREF (Ω) 1000 0 fS/2 fS INPUT FREQUENCY 2400 F25 2400 F26 Figure 25. INL Error vs RVREF (Large C) Figure 26.
PAGE 26
LTC2400 U TYPICAL APPLICATIONS SYNCHRONIZATION OF MULTIPLE LTC2400s Increasing the Output Rate Using Multiple LTC2400s Since the LTC2400’s absolute accuracy (total unadjusted error) is 10ppm, applications utilizing multiple matched ADCs are possible. A second application uses multiple LTC2400s to increase the effective output rate by 4×, see Figure 28. In this case, four LTC2400s are interleaved under the control of separate CS signals. This increases the effective output rate from 7.
PAGE 27
LTC2400 U TYPICAL APPLICATIONS LTC2400 #2 LTC2400 #1 VCC µCONTROLLER FO VCC LTC2400 #3 FO VCC VREF (0.1V TO VCC) EXTERNAL OSCILLATOR (153,600HZ) LTC2400 #4 FO VCC FO VREF SCK VREF SCK VREF SCK VREF SCK VIN SDO VIN SDO VIN SDO VIN SDO GND CS GND CS GND CS GND CS SCK SDO CS1 CS2 CS3 CS4 CS1 CS2 CS3 CS4 SCK 31 OR LESS CLOCK PULSES SDO 2400 F28 Figure 28.
PAGE 28
LTC2400 U TYPICAL APPLICATIONS 5V 0.1µF VREFIN 5V 0.1µF 1 VCC 2 4 7 8 3 VIN LTC2400 SDO SCK 11 LARGE MAGNITUDE DIFFERENTIAL INPUT CS VREF GND CS 1µF EXT CH 1µF 4 5 6 7 CHIP SELECT SERIAL SERIAL FO 8 12 13 14 16 C1 0.01µF 1/2 LTC1043 17 0.1µF – 5V 2400 F29 Figure 29.
PAGE 29
LTC2400 U TYPICAL APPLICATIONS 5V 5V 0.1µF VREFIN 0.1µF 5V 0.1µF BRIDGETYPICAL INPUT 350Ω 350Ω 1 4 VFS = 40mV 7 3 8 2 CS 1µF EXT CH 1µF – VIN LTC2400 0.1µF 4 5 6 7 CHIP SELECT SERIAL SERIAL FO 8 R1 9.09k – 5V 14 SDO SCK R2 90.9k 16 C1 0.01µF CS VREF GND 350Ω 350Ω AGND OR – VEXT 3 4 12 13 2 RS* 5.1k 6 LTC1050 11 DIFFERENTIAL INPUT 7 + VCC 1/2 LTC1043 *OPTIONAL: LIMITS INPUT CURRENT IF THE INPUT VOLTAGE GOES BELOW – 300mV 17 0.1µF – 5V 2400 F30 Figure 30.
PAGE 30
LTC2400 U TYPICAL APPLICATIONS Sample Driver for LTC2400 SPI Interface The LTC2400 has a very simple serial interface that makes interfacing to microprocessors and microcontrollers very easy. Shown in Figures 32 and 34 are listings of sample source codes that can be used to initiate conversions and retrieve data from the LTC2400. The listing in Figure 32 was created by Parallax, Inc. (916624-8333), for the BASIC Stamp.
PAGE 31
LTC2400 U TYPICAL APPLICATIONS ADlo.bit0 = in0 'and sample data line low SCK next high CS 'Disable the LTC2400 ADhi = (ADhi<<4)+((ADlo&$F000)>>12) debug ?ADhi 'Discard the lower eight bits goto Start 'and display (debug command). ShiftL Temp = ADlo.bit15 ADlo = ADlo<<1 ADhi = ADhi<<1 ADhi.bit0 = Temp return 'This routine simply 'performs a 1 bit 'left shift on two '16 bit variables Figure 32.
PAGE 32
LTC2400 U TYPICAL APPLICATIONS * DIN1 EQU $00 This memory location holds the LTC2400's bits 31 - 24 DIN2 EQU $01 This memory location holds the LTC2400's bits 23 - 16 DIN3 EQU $02 This memory location holds the LTC2400's bits 15 - 08 DIN4 EQU $03 This memory location holds the LTC2400's bits 07 - 00 * ********************** * Start GETDATA Routine * ********************** * ORG $C000 Program start location INIT1 LDS #$CFFF Top of C page RAM, beginning location of stack LDAA #$2F –,–,1,0;1,1,1,1 * –, –, SS
PAGE 33
LTC2400 U TYPICAL APPLICATIONS This circuit produces a DC offset at the cold junction reference point, of 1mV to 15mV, which must be nulled out in software. This DC offset, resulting from the forward voltage of the diode, is variable from device to device and must be calibrated for each unit.
PAGE 34
LTC2400 U TYPICAL APPLICATIONS thermocouple with the highest output is type E, at about 70mV. This circuit does not provide curvature correction for the Seebeck effect at the cold junction. If the application requires very high accuracy, the temperature of the cold junction should be determined via a separate input to the A/D, using an RTD for example. The cold junction compensation can be performed by implementing the thermocouple’s NBS polynominal curvature correction in software.
PAGE 35
LTC2400 U TYPICAL APPLICATIONS Simple Platinum RTD Interface A simpler, and potentially less expensive solution is the use of the LT1025 as shown in Figure 37. If high temperature resolution is required over a more limited range, Figure 38 can resolve approximately 0.01°C without additional amplification. The resistance of a platinum RTD changes by approximately 0.31Ω/°C at TA = 25°C.
PAGE 36
LTC2400 U TYPICAL APPLICATIONS The 12.1k resistor should be a precision resistor such as a Vishay S102 series, or must be temperature stabilized. The excitation current is low enough for most sensors that the self-heating effect is near the noise floor of the LTC2400. The use of a bipolar amplifier configuration shown in Figure 39 offers a potential resolution of 0.001°C In order to achieve these results, the following effects must be considered.
PAGE 37
LTC2400 U TYPICAL APPLICATIONS pick-up from the strain bearing member is largely 60Hz, the LTC2400 will reject it. If serious high frequency noise is present on the strain bearing member, it may be necessary to add buffering in order to allow the use of noise suppression. Stable Relaxation Oscillator for External Clock Applications that require that the notch produced by the LTC2400’s sinc4 filter be placed at some frequency other than 50Hz or 60Hz require an external clock.
PAGE 38
LTC2400 U TYPICAL APPLICATIONS The performance of the LTC2400 can be verified using the demonstration board DC228, see Figure 42 for the schematic. This circuit uses the computer’s serial port to generate power and the SPI digital signals necessary for starting a conversion and reading the result. It includes a Labview application software program (see Figure 43) which graphically captures the conversion results.
PAGE 39
LTC2400 W PACKAGE I FOR ATIO Dimensions in inches (millimeters) unless otherwise noted. U U S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 0.014 – 0.019 (0.355 – 0.483) 2 3 4 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.
PAGE 40
LTC2400 U W PCB LAYOUT A D FIL Component Side Component Side Solder Mask Component Side Paste Mask Solder Side Solder Mask Solder Side Paste Mask Solder Side RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1019 Precision Bandgap Reference, 2.5V, 5V 3ppm/°C Drift, 0.
PAGE 41
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