Datasheet

LTC2442
9
2442fa
For more information www.linear.com/LTC2442
CONVERTER OPERATION
Converter Operation Cycle
The LTC2442 is a multi-channel, high speed, DS ana
-
log-to-digital converter with an easy to use 3- or 4-wire
serial interface (see Figure 1). Its operation is made up
of three states. The converter operating cycle begins with
the conversion, followed by the sleep state and ends with
the data output/input (see Figure 2). The 4-wire interface
consists of serial data input (SDI), serial data output (SDO),
serial clock (SCK) and chip select (CS). The interface,
timing, operation cycle and data out format is compatible
with Linear’s entire family of DS converters.
Initially, the LTC2442 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
The part remains in the sleep state as long as CS is HIGH.
The conversion result is held indefinitely in a static shift
register while the converter is in the sleep state.
Once CS is pulled LOW, the device begins outputting the
conversion result. There is no latency in the conversion
result while operating in the 1X mode. The data output
corresponds to the conversion just performed. This re
-
1.69k
SDO
2442 TA03
Hi-Z TO V
OH
V
OL
TO V
OH
V
OH
TO Hi-Z
C
LOAD
= 20pF
1.69k
SDO
2442 TA04
Hi-Z TO V
OL
V
OH
TO V
OL
V
OL
TO Hi-Z
C
LOAD
= 20pF
V
CC
CONVERT
SLEEP
CHANNEL SELECT
SPEED SELECT
DATA OUTPUT
POWER UP
IN
+
=CH0, IN
–
=CH1
OSR=256,1X MODE
2442 F02
CS = LOW
AND
SCK
Figure 2. LTC2442 State Transition Diagram
applications inForMation
test circuits