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LTC2488

2488fa

SOURCE

(Ω)

+FS ERROR (ppm)

–20

1k 100k

2488 TA01b

–40

–60

–80

10 100 10k

= 5V

REF

= 5V

= 3.75V

–

= 1.25V

= GND

= 25°C

= 1μF

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

16-Bit 2-/4-Channel ΔΣ

ADC with Easy Drive Input

Current Cancellation

The LTC

2488 is a 4-channel (2-channel differential), 16-

bit, No Latency ΔΣ™ ADC with Easy Drive™ technology.

The patented sampling scheme eliminates dynamic input

current errors and the shortcomings of on-chip buffering

through automatic cancellation of differential input current.

This allows large external source impedances and rail-to-

rail input signals to be directly digitized while maintaining

exceptional DC accuracy.

The LTC2488 includes an integrated oscillator. This device

can be conﬁ gured to measure an external signal from

combinations of 4 analog input channels operating in single

ended or differential modes. It automatically rejects line

frequencies of 50Hz and 60Hz simultaneously.

The LTC2488 allows a wide common mode, input range

(0V to V

), independent of the reference voltage. Any

combination of single-ended or differential inputs can

be selected and the ﬁ rst conversion after a new channel

selection is valid.

Data Acquisition System

■

Up to 2 Differential or 4 Single-Ended Inputs

■

Easy Drive Technology Enables Rail-to-Rail Inputs

with Zero Differential Input Current

■

Directly Digitizes High Impedance Sensors with

Full Accuracy

■

600nV RMS Noise (0.02LSB Transition Noise)

■

GND to V

Input/Reference Common Mode Range

■

Simultaneous 50Hz/60Hz Rejection

■

2ppm INL, No Missing Codes

■

1ppm Offset and 15ppm Full-Scale Error

■

No Latency: Digital Filter Settles in a Single Cycle,

Even After a New Channel is Selected

■

Single Supply 2.7V to 5.5V Operation (0.8mW)

■

Internal Oscillator

■

Tiny 4mm × 3mm DFN Package

■

Direct Sensor Digitizer

■

Direct Temperature Measurement

■

Instrumentation

■

Industrial Process Control

Fullscale Error vs Source Resistance

SDI

SCK

SDO

REF

2.7V TO 5.5V

10μF

COM

REF

–

16-BIT ΔΣ ADC

WITH EASY DRIVE

4-CHANNEL

MUX

–

2488 TA01a

4-WIRE

SPI INTERFACE

CH0

CH1

CH3

CH2

0.1μF

OSC

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

No Latency ΔΣ and Easy Drive are trademarks of Linear Technology Corporation. All other

trademarks are the property of their respective owners.

Summary of content (30 pages)

PAGE 1
LTC2488 16-Bit 2-/4-Channel ΔΣ ADC with Easy Drive Input Current Cancellation FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Up to 2 Differential or 4 Single-Ended Inputs Easy Drive Technology Enables Rail-to-Rail Inputs with Zero Differential Input Current Directly Digitizes High Impedance Sensors with Full Accuracy 600nV RMS Noise (0.
PAGE 2
LTC2488 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) Supply Voltage (VCC) ................................... –0.3V to 6V Analog Input Voltage (CH0 to CH3, COM) ..................–0.3V to (VCC + 0.3V) REF+, REF– ................................–0.3V to (VCC + 0.3V) Digital Input Voltage......................–0.3V to (VCC + 0.3V) Digital Output Voltage ...................–0.3V to (VCC + 0.3V) Operating Temperature Range LTC2488C ................................................
PAGE 3
LTC2488 CONVERTER CHARACTERISTICS The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 3) PARAMETER CONDITIONS Input Common Mode Rejection DC 2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC (Note 5) ● 140 dB Input Common Mode Rejection 50Hz ±2% 2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC (Note 5) 2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC (Note 5) 2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC (Notes 5, 7) 2.
PAGE 4
LTC2488 DIGITAL INPUTS AND DIGITAL OUTPUTS The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS VIH 2.7V ≤ VCC ≤ 5.5V (Note 18) ● VIL High Level Input Voltage (⎯C⎯S, FO, SDI) ⎯ S ⎯ , FO, SDI) Low Level Input Voltage (C 2.7V ≤ VCC ≤ 5.5V ● VIH High Level Input Voltage (SCK) 2.7V ≤ VCC ≤ 5.
PAGE 5
LTC2488 DIGITAL INPUTS AND DIGITAL OUTPUTS The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C.
PAGE 6
LTC2488 TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity (VCC = 5V, VREF = 5V) –45°C 1 2 INL (ppm OF VREF) 2 25°C 0 85°C –1 –2 3 VCC = 5V VREF = 2.5V VIN(CM) = 1.25V FO = GND 1 2 –45°C, 25°C, 85°C 0 –1 –2 –3 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 INPUT VOLTAGE (V) 2 –3 –1.25 2.5 –0.75 12 8 85°C 25°C 4 0 –45°C –4 –8 –12 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 INPUT VOLTAGE (V) 2 VCC = 5V VREF = 2.5V VIN(CM) = 1.25V FO = GND 12 85°C 25°C –45°C 0 –4 –0.75 –0.
PAGE 7
LTC2488 TYPICAL PERFORMANCE CHARACTERISTICS On-Chip Oscillator Frequency vs Temperature Offset Error vs VREF 0.1 0 –0.1 308 308 306 304 302 –0.2 –0.3 310 0 1 2 3 VREF (V) 300 –45 –30 –15 5 4 VCC = 4.1V VREF = 2.5V VIN = 0V VIN(CM) = GND FO = GND –20 –40 REJECTION (dB) REJECTION (dB) 75 90 –60 –80 VCC = 4.1V DC ±1.4V VREF = 2.5V IN+ = GND IN– = GND FO = GND TA = 25°C –60 –80 –140 0 20 40 60 80 100 120 140 160 180 200 220 FREQUENCY AT VCC (Hz) 2488 G13 140 VCC = 2.7V 120 1.
PAGE 8
LTC2488 PIN FUNCTIONS FO (Pin 1): Frequency Control Pin. Digital input that controls the internal conversion clock rate. When FO is connected to ground, the converter uses its internal oscillator running at 307.2kHz. The conversion clock may also be overridden by driving the FO pin with an external clock in order to change the output rate and the digital ﬁlter rejection null. SDI (Pin 2): Serial Data Input. This pin is used to select the input channel.
PAGE 9
LTC2488 FUNCTIONAL BLOCK DIAGRAM INTERNAL OSCILLATOR VCC GND CH0 CH1 CH2 CH3 COM FO (INT/EXT) AUTOCALIBRATION AND CONTROL REF+ REF– IN+ MUX IN– – + DIFFERENTIAL 3RD ORDER ΔΣ MODULATOR SERIAL INTERFACE SDI SCK SDO CS DECIMATING FIR ADDRESS 2488 BD Figure 1. Functional Block Diagram TEST CIRCUITS VCC 1.69k SDO SDO 1.
PAGE 10
LTC2488 TIMING DIAGRAMS Timing Diagram Using Internal SCK (SCK HIGH with ⎯C⎯S↓) CS t1 SDO t2 Hi-Z Hi-Z tKQMIN t3 tKQMAX SCK t7 t8 SDI SLEEP DATA IN/OUT CONVERSION 2488 TD01 Timing Diagram Using External SCK (SCK LOW with ⎯C⎯S↓) CS t1 SDO Hi-Z t2 Hi-Z t5 tKQMIN t4 tKQMAX SCK t7 t8 SDI SLEEP DATA IN/OUT CONVERSION 2488 TD02 2488fa 10
PAGE 11
LTC2488 APPLICATIONS INFORMATION CONVERTER OPERATION Converter Operation Cycle The LTC2488 is a multi-channel, low power, delta-sigma, analog-to-digital converter with an easy-to-use 4-wire interface and automatic differential input current cancellation. Its operation is made up of four states (See Figure 2). The converter’s operating cycle begins with the conversion, followed by the sleep state, and ends with the data input/output cycle.
PAGE 12
LTC2488 APPLICATIONS INFORMATION enables external RC networks and high impedance sensors to directly interface to the LTC2488 without external ampliﬁers. The remaining common mode input current is eliminated by either balancing the differential input impedances or setting the common mode input equal to the common mode reference (see Automatic Differential Input Current Cancellation Section). This unique architecture does not require on-chip buffers, thereby enabling signals to swing beyond ground and VCC.
PAGE 13
LTC2488 APPLICATIONS INFORMATION The serial clock pin (SCK) can be conﬁgured as either a master (SCK is an output generated internally) or a slave (SCK is an input and applied externally). Master mode (Internal SCK) is selected by simply ﬂoating the SCK pin. Slave mode (External SCK) is selected by driving SCK low during power up and each falling edge of ⎯C⎯S. Speciﬁc details of these SCK modes are described in the Serial Interface Timing Modes section.
PAGE 14
LTC2488 APPLICATIONS INFORMATION This bit serves as ⎯E⎯O⎯C (Bit 23) for the next conversion cycle. Table 2 summarizes the output data format. Data is shifted out of the SDO pin under control of the serial clock (SCK) (see Figure 3). Whenever ⎯C⎯S is HIGH, SDO remains high impedance and SCK is ignored. As long as the voltage on the IN+ and IN– pins remains between –0.3V and VCC + 0.3V (absolute maximum operating range) a conversion result is generated for any differential input voltage VIN from –FS = –0.
PAGE 15
LTC2488 APPLICATIONS INFORMATION After power up, the device initiates an internal reset cycle which sets the input channel to CH0 to CH1 (IN+ = CH0, IN– = CH1). The ﬁrst conversion automatically begins at power up using this default input channel. Once the conversion is complete, a new word may be written into the device. The ﬁrst three bits of the input word consist of two preamble bits and one enable bit. These three bits are used to enable the input channel selection.
PAGE 16
LTC2488 APPLICATIONS INFORMATION External Serial Clock, Single Cycle Operation When the device is in the sleep state, its conversion result is held in an internal static shift register. The device remains in the sleep state until the ﬁrst rising edge of SCK is seen while ⎯C⎯S is LOW. The input data is then shifted in via the SDI pin on each rising edge of SCK (including the ﬁrst rising edge). The channel selection will be used for the following conversion cycle.
PAGE 17
LTC2488 APPLICATIONS INFORMATION state. However, the data output state may be aborted by pulling ⎯C⎯S HIGH any time between the 1st falling edge and the 24th falling edge of SCK (see Figure 5). On the rising edge of ⎯C⎯S, the device aborts the data output state and immediately initiates a new conversion. In order to program a new input channel, 8 SCK clock pulses are required.
PAGE 18
LTC2488 APPLICATIONS INFORMATION 2.7V TO 5.5V 12 VCC = EXTERNAL OSCILLATOR = INTERNAL OSCILLATOR 1 FO LTC2488 10μF REFERENCE VOLTAGE 0.1V TO VCC 0.
PAGE 19
LTC2488 APPLICATIONS INFORMATION 2.7V TO 5.5V 12 VCC = EXTERNAL OSCILLATOR = INTERNAL OSCILLATOR 1 FO LTC2488 10μF REFERENCE VOLTAGE 0.1V TO VCC 0.
PAGE 20
LTC2488 APPLICATIONS INFORMATION 2.7V TO 5.5V 12 VCC = EXTERNAL OSCILLATOR = INTERNAL OSCILLATOR 1 FO LTC2488 10μF REFERENCE VOLTAGE 0.1V TO VCC 0.
PAGE 21
LTC2488 APPLICATIONS INFORMATION Whenever SCK is LOW, the LTC2488’s internal pull-up at SCK is disabled. Normally, SCK is not externally driven if the device is operating in the internal SCK timing mode. However, certain applications may require an external driver on SCK. If the driver goes Hi-Z after outputting a LOW signal, the internal pull-up is disabled. An external 10k pull-up resistor prevents the device from exiting the internal SCK mode under this condition.
PAGE 22
LTC2488 APPLICATIONS INFORMATION IIN+ IN+ INPUT MULTIPLEXER 100Ω INTERNAL SWITCH NETWORK ( ) I IN+ 10k ( ) ( ) = I IN– I REF + AVG AVG = VIN(CM) VREF(CM) 0.5•REQ ( 1.5VREF + VREF(CM) – VIN(CM) 0.5 •REQ )– 2 VIN VREF •REQ where: IIN– IN– AVG 100Ω VREF =REF + REF REF + –REF VREF(CM) = 2 10k IREF+ REF+ CEQ 12pF 10k VIN =IN+ IN ,WHERE IN+ AND IN ARE THE SELECTED INPUT CHANNELS IN+ –IN VIN(CM) = 2 REQ = 2.98M INTERNAL OSCILLATOR ( ) REQ = 0.
PAGE 23
LTC2488 APPLICATIONS INFORMATION In addition to the input sampling current, the input ESD protection diodes have a temperature dependent leakage current. This current, nominally 1nA (±10nA Max), results in a small offset shift. A 1k source resistance will create a 1μV typical and a 10μV maximum offset voltage.
PAGE 24
LTC2488 APPLICATIONS INFORMATION 500 VCC = 5V VREF = 5V VIN+ = 3.75V VIN– = 1.25V FO = GND TA = 25°C +FS ERROR (ppm) 400 300 Normal Mode Rejection and Anti-aliasing CREF = 1μF, 10μF CREF = 0.1μF 200 CREF = 0.01μF 100 0 200 0 600 400 RSOURCE (Ω) 800 1000 2488 F13 Figure 13. +FS Error vs RSOURCE at VREF (Large CREF) 0 –100 –FS ERROR (ppm) CREF = 0.01μF –200 CREF = 1μF, 10μF –300 VCC = 5V VREF = 5V VIN+ = 1.25V VIN– = 3.75V FO = GND TA = 25°C –400 –500 0 200 CREF = 0.
PAGE 25
LTC2488 APPLICATIONS INFORMATION proprietary architecture used for the LTC2488 third order modulator resolves this problem and guarantees stability with input signals 150% of full-scale. In many industrial applications, it is not uncommon to have microvolt level signals superimposed over unwanted error sources with several volts of peak-to-peak noise. Figure 19 shows measurement results for the rejection of a 7.5V peak-to-peak noise source (150% of full scale) applied to the LTC2488.
PAGE 26
LTC2488 APPLICATIONS INFORMATION ness of internal auto calibration circuits begins to degrade. This results in larger offset errors, full scale errors, and decreased resolution (see Figures 20 to 27). Easy Drive ADCs Simplify Measurement of High Impedance Sensors Delta-Sigma ADCs, with their high accuracy and high noise immunity, are ideal for directly measuring many types of sensors.
PAGE 27
LTC2488 APPLICATIONS INFORMATION 30 3000 TA = 85°C 20 10 2500 2000 TA = 25°C –3000 0 10 20 30 40 50 60 70 80 90 100 OUTPUT DATA RATE (READINGS/SEC) 18 18 16 16 12 10 VIN(CM) = VREF(CM) VCC = VREF = 5V VIN = 0V FO = EXT CLOCK RES = LOG 2 (VREF/NOISERMS) 0 10 20 30 40 50 60 70 80 90 100 OUTPUT DATA RATE (READINGS/SEC) TA = 25°C TA = 85°C 14 12 VIN(CM) = VREF(CM) VCC = VREF = 5V FO = EXT CLOCK RES = LOG 2 (VREF/INLMAX) 10 0 10 20 30 40 50 60 70 80 90 100 OUTPUT DATA RATE (READINGS/SEC) VIN(C
PAGE 28
LTC2488 PACKAGE DESCRIPTION DE Package 14-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1708 Rev B) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.115 TYP 4.00 ±0.10 (2 SIDES) R = 0.05 TYP 3.00 ±0.10 (2 SIDES) 8 0.40 ± 0.10 14 3.30 ±0.10 1.70 ± 0.10 PIN 1 NOTCH R = 0.20 OR 0.
PAGE 29
LTC2488 REVISION HISTORY REV DATE DESCRIPTION A 7/10 Revised Typical Application drawing Added Note 18 PAGE NUMBER 1 4, 5 2488fa 29
PAGE 30
LTC2488 TYPICAL APPLICATION 5V 5V R1 51.1k C4 0.1μF 12 10μF IIN+ = 0 R3 10k TO 100k IIN– = 0 R4 51.1k 14 8 5V 9 10 5V 102k 11 + 0.1μF 10k TO 100k 7 1k LT1494 REF+ REF– CH0 2 SDI 3 SCK SDO 3-WIRE SPI INTERFACE 5 CH1 CH2 4 CS CH3 COM GND 6 2488 F28 0.1μF – = EXTERNAL OSCILLATOR = INTERNAL OSCILLATOR 1 FO LTC2492 13 0.1μF C3 0.1μF VCC 1k 0.1μF Figure 28.