Datasheet

LTC2488
14
2488fa
APPLICATIONS INFORMATION
Data is shifted out of the SDO pin under control of the
serial clock (SCK) (see Figure 3). Whenever
⎯
C
⎯
S is HIGH,
SDO remains high impedance and SCK is ignored.
In order to shift the conversion result out of the device,
⎯
C
⎯
S must fi rst be driven LOW.
⎯
E
⎯
O
⎯
C is seen at the SDO pin
of the device once
⎯
C
⎯
S is pulled LOW.
⎯
E
⎯
O
⎯
C changes in real
time as a function of the internal oscillator or the clock
applied to the f
O
pin from HIGH to LOW at the completion
of a conversion. This signal may be used as an interrupt for
an external microcontroller. Bit 23 (
⎯
E
⎯
O
⎯
C) can be captured
on the fi rst rising edge of SCK. Bit 22 is shifted out of the
device on the fi rst falling edge of SCK. The fi nal data bit
(Bit 0) is shifted out on the on the falling edge of the 23rd
SCK and may be latched on the rising edge of the 24th SCK
pulse. On the falling edge of the 24th SCK pulse, SDO goes
HIGH indicating the initiation of a new conversion cycle.
This bit serves as
⎯
E
⎯
O
⎯
C (Bit 23) for the next conversion
cycle. Table 2 summarizes the output data format.
As long as the voltage on the IN
+
and IN
–
pins remains be-
tween –0.3V and V
CC
+ 0.3V (absolute maximum operating
range) a conversion result is generated for any differential
input voltage V
IN
from –FS = –0.5 • V
REF
to +FS = 0.5 •
V
REF
. For differential input voltages greater than +FS, the
conversion result is clamped to the value corresponding to
+FS + 1LSB. For differential input voltages below –FS, the
conversion result is clamped to the value –FS – 1LSB.
INPUT DATA FORMAT
The LTC2488 serial input word is 8 bits long. The input
bits (SGL, ODD, A2, A1, A0) are used to select the input
channel.
EOC
CS
SCK
(EXTERNAL)
SDI
SDO
2488 F03
CONVERSION
SLEEP
DATA INPUT/OUTPUT
MSB
BIT 20 BIT 19 BIT 18 BIT 17 BIT 16 BIT 15 BIT 14 BIT 13 BIT 12 BIT 11
SIG
BIT 21
“0”
BIT 22BIT 23
1 0 EN SGL A2 A1 A0ODD
BIT 10 BIT 9 BIT 0
1234567891011121314 24
DON'T CAREDON'T CARE
Figure 3. Channel Selection and Data Output Timing
Table 2. Output Data Format
Differential Input Voltage
V
IN
*
Bit 23
⎯
E
⎯
O
⎯
C
Bit 22
DMY
Bit 21
SIG
Bit 20
MSB
Bit 19 Bit 18 Bit 17 … Bit 4
LSB
Bits 3 to 0
Always 0
V
IN
* ≥ 0.5 • V
REF
** 0 0 1 1 0 0 0 … 0 0000
0.5 • V
REF
** – 1LSB 0 0 1 0 1 1 1 … 1 0000
0.25 • V
REF
** 0 0 1 0 1 0 0 … 0 0000
0.25 • V
REF
** – 1LSB 0 0 1 0 0 1 1 … 1 0000
0 0 0 1 0 0 0 0 … 0 0000
–1LSB 0 0 0 1 1 1 1 … 1 0000
–0.25 • V
REF
** 0 0 0 1 1 0 0 … 0 0000
–0.25 • V
REF
** – 1LSB 0 0 0 1 0 1 1 … 1 0000
–0.5 • V
REF
** 0 0 0 1 0 0 0 … 0 0000
V
IN
* < –0.5 • V
REF
** 0 0 0 0 1 1 1 … 1 0000
*The differential input voltage V
IN
= IN
+
– IN
–
. **The differential reference voltage V
REF
= REF
+
– REF
–
.