Datasheet

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LTC2604/LTC2614/LTC2624

2604fd

BLOCK DIAGRAM

FEATURES

APPLICATIONS

DESCRIPTION

Quad 16-Bit Rail-to-Rail DACs

in 16-Lead SSOP

CODE

0 16384 32768 49152 65535

ERROR (LSB)

2604 TA01

1.0

0.8

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

–1.0

= 5V

REF

= 4.096V

GND

REF LO

REF A

OUTA

OUTB

REF B

CS/LD

SCK

REF D

OUT D

OUT C

REF C

SDO

SDI

2604 BD

DAC A

DAC D

DAC B

DAC C

DECODE

CONTROL

LOGIC

32-BIT SHIFT REGISTER

CLR

INPUT

DAC

INPUT

DAC

The LTC

2604/LTC2614/LTC2624 are quad 16-,14- and

12-bit 2.5V to 5.5V rail-to-rail voltage output DACs in

16-lead narrow SSOP packages. These parts have separate

reference inputs for each DAC. They have built-in high per-

formance output buffers and are guaranteed monotonic.

These parts establish advanced performance standards

for output drive, crosstalk and load regulation in single-

supply, voltage output multiples.

The parts use a simple SPI/MICROWIRE compatible

3-wire serial interface which can be operated at clock rates

up to 50MHz. Daisy-chain capability and a hardware CLR

function are included.

The LTC2604/LTC2614/LTC2624 incorporate a power-on

reset circuit. During power-up, the voltage outputs rise less

than 10mV above zero scale; and after power-up, they stay

at zero scale until a valid write and update take place. The

power-on reset circuit resets the LTC2604-1/LTC2614-1

/LTC2624-1 to midscale. The voltage outputs stay at mid-

scale until a valid write and update take place.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Smallest Pin Compatible Quad 16-Bit DAC:

LTC2604: 16-Bits

LTC2614: 14-Bits

LTC2624: 12-Bits

Guaranteed 16-Bit Monotonic Over Temperature

Separate Reference Inputs for each DAC

Wide 2.5V to 5.5V Supply Range

Low Power Operation: 250μA per DAC at 3V

Individual DAC Power-Down to 1μA, Max

Ultralow Crosstalk Between DACs (<5μV)

High Rail-to-Rail Output Drive (±15mA)

Double Buffered Digital Inputs

LTC2604-1/LTC2614-1/LTC2624-1: Power-On Reset

to Midscale

16-Lead Narrow SSOP Package

Mobile Communications

Process Control and Industrial Automation

Instrumentation

Automatic Test Equipment

Differential Nonlinearity (LTC2604)

Summary of content (16 pages)

PAGE 1
LTC2604/LTC2614/LTC2624 Quad 16-Bit Rail-to-Rail DACs in 16-Lead SSOP FEATURES DESCRIPTION n The LTC®2604/LTC2614/LTC2624 are quad 16-,14- and 12-bit 2.5V to 5.5V rail-to-rail voltage output DACs in 16-lead narrow SSOP packages. These parts have separate reference inputs for each DAC. They have built-in high performance output buffers and are guaranteed monotonic.
PAGE 2
LTC2604/LTC2614/LTC2624 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW Any Pin to GND ............................................ –0.3V to 6V Any Pin to VCC ............................................. –6V to 0.3V Maximum Junction Temperature .......................... 125°C Operating Temperature Range LTC2604C/LTC2614C/LTC2624C ............. 0°C to 70°C LTC2604C-1/LTC2614C-1/ LTC2624C-1 ............................................. 0°C to 70°C LTC2604I/LTC2614I/LTC2624I .............
PAGE 3
LTC2604/LTC2614/LTC2624 ELECTRICAL CHARACTERISTICS The ● denotes speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. REF A = REF B = REF C = REF D = 4.096V (VCC = 5V), REF A = REF B = REF C = REF D = 2.048V (VCC = 2.5V), REF LO = 0V, VOUT unloaded, unless otherwise noted. (Note 10) SYMBOL PARAMETER Load Regulation ZSE VOS CONDITIONS LTC2614/LTC2614-1 LTC2604/LTC2604-1 MIN MIN MIN TYP MAX 0.025 0.125 0.025 0.125 0.1 0.1 VREF = VCC = 2.
PAGE 4
LTC2604/LTC2614/LTC2624 ELECTRICAL CHARACTERISTICS The ● denotes speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. REF A = REF B = REF C = REF D = 4.096V (VCC = 5V), REF A = REF B = REF C = REF D = 2.048V (VCC = 2.5V), REF LO = 0V, VOUT unloaded, unless otherwise noted. (Note 10) SYMBOL PARAMETER CONDITIONS MIN VIL Digital Input Low Voltage VCC = 4.5V to 5.5V VCC = 2.5V to 5.
PAGE 5
LTC2604/LTC2614/LTC2624 TIMING CHARACTERISTICS The ● denotes speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. REF A = REF B = REF C = REF D = 4.096V (VCC = 5V), REF A = REF B = REF C = REF D = 2.048V (VCC = 2.5V), REF LO = 0V, VOUT unloaded, unless otherwise noted.
PAGE 6
LTC2604/LTC2614/LTC2624 TYPICAL PERFORMANCE CHARATERISTICS (LTC2604/LTC2604-1, LTC2614/LTC2614-1, LTC2624/LTC2624-1) Gain Error vs VCC ICC Shutdown vs VCC Large-Signal Settling 450 0.3 400 0.2 350 0.1 300 ICC (nA) GAIN ERROR (%FSR) 0.4 0 –0.1 VOUT 0.5V/DIV 250 200 VREF = VCC = 5V 1/4-SCALE TO 3/4-SCALE 150 –0.2 100 –0.3 2.5μs/DIV 50 –0.4 2.5 3.5 3 4 VCC (V) 4.5 5 0 2.5 5.5 3.5 3 4 VCC (V) 4.5 5 2604 G07 2604 G09 5.
PAGE 7
LTC2604/LTC2614/LTC2624 TYPICAL PERFORMANCE CHARATERISTICS (LTC2604/LTC2604-1, LTC2614/LTC2614-1, LTC2624/LTC2624-1) Hardware CLR Hardware CLR to Midscale Multiplying Frequency Response 0 VCC = 5V VREF = 4.096V CODE = FULL SCALE VOUT 1V/DIV VOUT 1V/DIV –3 –6 –9 –12 dB –15 CLR 5V/DIV –18 –21 CLR 5V/DIV –24 VCC = 5V VREF (DC) = 2V VREF (AC) = 0.2VP-P CODE = FULL SCALE –27 2604 G15 1μs/DIV –30 2604 G35 1μs/DIV –33 –36 1k 1M 10k 100k FREQUENCY (Hz) 2604 G16 Output Voltage Noise, 0.
PAGE 8
LTC2604/LTC2614/LTC2624 TYPICAL PERFORMANCE CHARATERISTICS (LTC2604/LTC2604-1) DNL vs Temperature INL vs VREF 1.0 32 VCC = 5V 0.8 VREF = 4.096V DNL vs VREF 1.5 VCC = 5.5V 24 1.0 0.6 16 DNL (POS) 0 –0.2 0.5 INL (POS) 8 INL (LSB) 0.2 DNL (LSB) 0.4 DNL (LSB) VCC = 5.5V 0 –8 DNL (NEG) INL (NEG) DNL (POS) 0 DNL (NEG) –0.5 –0.4 –16 –0.6 –1.0 –24 –0.8 –1.0 –50 –30 –10 10 30 50 TEMPERATURE (°C) 70 –32 90 1 0 2 3 VREF (V) 4 2604 G23 5 –1.
PAGE 9
LTC2604/LTC2614/LTC2624 TYPICAL PERFORMANCE CHARATERISTICS (LTC2624/LTC2624-1) Integral Nonlinearity (INL) 2.0 Differential Nonlinearity (DNL) 1.0 VCC = 5V VREF = 4.096V 1.5 0.6 6.8μs 0.4 0.5 DNL (LSB) INL (LSB) VCC = 5V VREF = 4.096V 0.8 1.0 0 –0.5 VOUT 1mV/DIV 0.2 0 CS/LD 2V/DIV –0.2 –0.4 –1.0 –0.6 –1.5 –2.0 Settling to ±1LSB 2μs/DIV –0.8 0 1024 2048 CODE 3072 4095 –1.0 0 1024 2604 G31 2048 CODE 3072 4095 2604 G33 VCC = 5V, VREF = 4.
PAGE 10
LTC2604/LTC2614/LTC2624 BLOCK DIAGRAM VCC GND 1 REF LO 2 REF A 16 REF D 15 DAC B 5 REF B INPUT REGISTER DAC REGISTER DAC REGISTER VOUTB VOUT D DAC D INPUT REGISTER DAC REGISTER DAC A 4 INPUT REGISTER DAC REGISTER VOUTA INPUT REGISTER 3 DAC C 14 VOUT C 13 REF C 12 CLR 11 6 CONTROL LOGIC CS/LD 7 SDO DECODE 10 SCK SDI 9 32-BIT SHIFT REGISTER 8 2604 BD TIMING DIAGRAM t1 t2 SCK t3 1 t6 t4 2 3 23 24 t10 SDI t5 t7 CS/LD t8 SDO 2604 F01 Figure 1 OPERATION Power-On Reset Th
PAGE 11
LTC2604/LTC2614/LTC2624 OPERATION Power Supply Sequencing Table 1. The voltage at REF (Pins 3, 6, 12 and 15) should be kept within the range – 0.3V ≤ REF x ≤ VCC + 0.3V (see Absolute Maximum Ratings). Particular care should be taken to observe these limits during power supply turn-on and turn-off sequences, when the voltage at VCC (Pin 16) is in transition.
PAGE 12
LTC2604/LTC2614/LTC2624 OPERATION operation copies the data word from the input register to the DAC register. Once copied into the DAC register, the data word becomes the active 16-, 14- or 12-bit input code, and is converted to an analog voltage at the DAC output. The update operation also powers up the selected DAC if it had been in power-down mode. The data path and registers are shown in the block diagram. While the minimum input word is 24 bits, it may optionally be extended to 32 bits.
PAGE 13
X X SDI SDO SCK CS/LD 1 X X 2 3 X 4 X X C3 SDI X 5 X DON’T CARE X C2 2 C1 3 X X 6 X X 7 COMMAND WORD 1 SCK CS/LD C0 X X 4 8 A3 A2 6 A1 7 A0 8 D15 9 D14 10 D12 12 D11 13 D10 14 24-BIT INPUT WORD D13 11 D9 15 D7 17 DATA WORD D8 16 D6 18 D5 19 C1 11 C2 C1 COMMAND WORD C2 10 C0 C0 A3 A3 A2 14 A1 15 A2 A1 ADDRESS WORD 13 A0 A0 16 17 D15 D15 PREVIOUS 32-BIT INPUT WORD 12 D14 D14 18 t2 t8 D9 D9 t4 23 PREVIOUS D15 t3 17
PAGE 14
LTC2604/LTC2614/LTC2624 OPERATION DC output impedance is equivalent to load regulation, and may be derived from it by simply calculating a change in units from LSB/mA to Ohms. The ampliﬁers’ DC output impedance is 0.025Ω when driving a load well away from the rails. the device’s ground pin as possible. Ideally, the analog ground plane should be located on the component side of the board, and should be allowed to run under the part to shield it from noise.
PAGE 15
LTC2604/LTC2614/LTC2624 PACKAGE DESCRIPTION GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .0532 – .0688 (1.35 – 1.75) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .
PAGE 16
LTC2604/LTC2614/LTC2624 TYPICAL APPLICATION 5V 5V 1k 1k 10k 10k 0.1μF 10k 0.01μF 0.1μF 10k 20Ω 49.9Ω 70MHz IN 47pF ZC830 0.01μF OUT 10pF 49.9Ω 20pF 49.9Ω ZC830 DAC A DAC B DAC C DAC D OPTIONAL 20k 0.1μF OPTIONAL 20k 0.1μF CS/LD SCK SDI LTC2604 5V 5V LO 2.74k 1% 100k 2.74k 1% 100k 2.74k 1% 90° 2.74k 1% I+Q MODULATOR Q INPUT I INPUT 5V 5V 2.74k 1% 0° 2.74k 1% RF *ZETEX 2.74k 1% 2.74k 1% 2604 F04 (516) 543-7100 Figure 4.