Datasheet

LTC2655
1
2655f
BLOCK DIAGRAM
FEATURES DESCRIPTION
Quad I
2
C 16-/12-Bit
Rail-to-Rail DACs with
10ppm/°C Max Reference
The LTC
®
2655 is a family of Quad I
2
C 16-/12-Bit Rail-to-
Rail DACs with integrated 10ppm/°C max reference. The
DACs have built-in high performance, rail-to-rail, output
buffers and are guaranteed monotonic. The LTC2655-L
has a full-scale output of 2.5V with the integrated refer-
ence and operates from a single 2.7V to 5.5V supply.
The LTC2655-H has a full-scale output of 4.096V with
the integrated reference and operates from a 4.5V to
5.5V supply. Each DAC can also operate with an external
reference, which sets the full-scale output to 2 times the
external reference voltage.
The parts use the 2-wire I
2
C compatible serial interface.
The LTC2655 operates in both the standard mode (maxi-
mum clock rate of 100kHz) and the fast mode (maximum
clock rate of 400kHz). The LTC2655 incorporates a
power-on reset circuit that is controlled by the PORSEL
pin. If PORSEL is tied to GND the DACs power-on reset to
zero-scale. If PORSEL is tied to V
CC
, the DACs power-on
reset to mid-scale.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5396245, 6891433 and 7671770.
INL Curve
APPLICATIONS
n
Integrated Reference 10ppm/°C Max
n
Maximum INL Error: ±4LSB at 16 Bits
n
Guaranteed Monotonic Over Temperature
n
Selectable Internal or External Reference
n
2.7V to 5.5V Supply Range (LTC2655-L)
n
Integrated Reference Buffers
n
Ultralow Crosstalk Between DACs (<1nVs)
n
Power-On-Reset to Zero-Scale/Mid-Scale
n
Asynchronous DAC Update Pin
n
Tiny 20-Lead 4mm × 4mm QFN and
16-Lead Narrow SSOP packages
n
Mobile Communications
n
Process Control and Industrial Automation
n
Instrumentation
n
Automatic Test Equipment
n
Automotive
2655 BD
GND
V
OUTA
V
OUTB
SCL
CA2
LDAC
REFLO
CA1
CA0
REFIN/OUT
REFCOMP
V
CC
V
OUTD
V
OUTC
PORSEL
SDA
INTERNAL REFERENCE
DAC A
POWER-ON
RESET
DAC B
DAC D
DAC C
REGISTER
32-BIT SHIFT REGISTER
2-WIRE INTERFACE
REGISTER
REGISTERREGISTER
REGISTERREGISTER
REGISTERREGISTER
CODE
128
INL (LSB)
4
–2
–1
–3
2
3
1
0
–4
32768 4915216384
2655 TA01b
65535
V
CC
= 5V

Summary of content (28 pages)