Datasheet

LTC3300-1
23
33001fb
For more information www.linear.com/LTC3300-1
OPERATION
ACTIVE
5.6V
LTC3300-1
V
REG
WDT
RTONS
R
TONS
33001 F06a
V
–
1.2V
R
TONS
R
WDT
ACTIVE
5.6V
LTC3300-1V
TH
= 1.4V
V
REG
WDT
RTONS
R
TONS
PAUSE/
RESUME
33001 F06b
1.2V
R
TONS
ACTIVE
5.6V
V
REG
V
REG
TO TRANSFORMER
SECONDARY WINDINGS
LTC3300-1
WDT
RTONS
R
TONS
V
REG
V
REG
PAUSE/
RESUME
EITHER/OR
PAUSE/
RESUME
33001 F06c
1.2V
R
TONS
R
SEC_OVP
(6a) Watchdog Timer Only (WDT = V
–
to Defeat) (6b) Pause/Resume Balancing Only
(6c) Watchdog Timer with Pause/Resume Balancing and Secondary Winding OVP Protection
Figure 6. WDT Pin Connection Options
only restart if an execute command is written. To defeat
the watchdog function, simply connect the WDT pin to V
–
.
Pause/Resume Balancing (via WDT Pin)
The WDT output pin doubles as a logic input (TTL levels)
which can be driven by an external logic gate as shown in
Figure 6b (no watchdog), or by a PMOS/three-state logic
gate as shown in Figure 6c (with watchdog) to pause and
resume balancing in progress. The external pull-up must
have sufficient drive capability to override the current source
to ground at the WDT pin (=1.2V/R
TONS
). Provided that
the internal watchdog timer has not independently timed
out, externally pulling the WDT pin high will immediately
pause balancing, and it will resume where it left off when
the pin is released.
Secondary Winding OVP Function (via WDT pin)
The precision current source pull-down on the WDT pin
during balancing can be used to construct an accurate
secondary winding OVP protection circuit as shown in
Figure 6c. A second external resistor, scaled to R
TONS
and connected to the transformer secondary winding, is
used to set the comparator threshold. An NMOS cascode
device (with gate tied to V
REG
) is also needed to protect