Datasheet

LTC3300-1
5
33001fb
For more information www.linear.com/LTC3300-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C. (Note 2) BOOST
+
= 25.2V, C6 = 21.6V, C5 = 18V, C4 = 14.4V,
C3 = 10.8V, C2 = 7.2V, C1 = 3.6V, V
–
= 0V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
r_S
Secondary Winding Gate Drive
Rise Time (10% to 90%)
G1S, C
GATE
= 2500pF
G2S Through G6S, CTRL = 0 Only, C
GATE
= 2500pF
30
30
60
60
ns
ns
t
f_S
Secondary Winding Gate Drive Fall
Time (90% to 10%)
G1S, C
GATE
= 2500pF
G2S Through G6S, CTRL = 0 Only, C
GATE
= 2500pF
20
20
40
40
ns
ns
t
ONP|MAX
Primary Winding Switch Maximum
On-Time
R
RTONP
= 20kΩ (Measured at G1P-G6P)
l
6 7.2 8.4 µs
t
ONP|MAX
Matching (All 6) ±[(Max – Min)/(Max + Min)] • 100%
l
±1 ±4 %
t
ONS|MAX
Secondary Winding Switch
Maximum On-Time
R
RTONS
= 15kΩ (Measured at G1S-G6S)
l
1 1.2 1.4 µs
t
ONS|MAX
Matching (All 6) ±[(Max – Min)/(Max + Min)] • 100%
l
±1 ±4 %
t
DLY_START
Delayed Start Time After New/
Different Balance Command or
Recovery from Voltage/Temp Fault
2 ms
Voltage Mode Timing Specifications
t
1
SDI Valid to SCKI Rising Setup Write Operation
l
10 ns
t
2
SDI Valid from SCKI Rising Hold Write Operation
l
250 ns
t
3
SCKI Low
l
400 ns
t
4
SCKI High
l
400 ns
t
5
CSBI Pulse Width
l
400 ns
t
6
SCKI Rising to CSBI Rising
l
100 ns
t
7
CSBI Falling to SCKI Rising
l
100 ns
t
8
SCKI Falling to SDO Valid Read Operation
l
250 ns
f
CLK
Clock Frequency
l
1 MHz
t
WD1
Watchdog Timer Timeout Period WDT Assertion Measured from Last Valid
Command Byte
l
0.75 1.5 2.25 second
t
WD2
Watchdog Timer Reset Time WDT Negation Measured from Last Valid
Command Byte
l
1.5 5 µs
Current Mode Timing Specifications
t
PD1
CSBI to CSBO Delay C
CSBO
= 150pF
l
600 ns
t
PD2
SCKI Rising to SCKO Delay C
SCKO
= 150pF
l
300 ns
t
PD3
SDI to SDOI Delay C
SDOI
= 150pF, Command Byte
l
300 ns
t
PD4
SCKI Falling to SDOI Valid C
SDOI
= 150pF, Write Balance Command
l
300 ns
t
PD5
SCKI Falling to SDI Valid C
SDI
= 150pF, Read Operation
l
300 ns
t
SCKO
SCKO Pulse Width C
SCKO
= 150pF 100 ns
Voltage Mode Digital I/O Specifications
V
IH
Digital Input Voltage High Pins CSBI, SCKI, SDI; V
MODE
= V
REG
Pins CTRL, BOOST, V
MODE
, TOS
Pin WDT
l
l
l
V
REG
– 0.5
V
REG
– 0.5
2
V
V
V
V
IL
Digital Input Voltage Low Pins CSBI, SCKI, SDI; V
MODE
= V
REG
Pins CTRL, BOOST, V
MODE
, TOS
Pin WDT
l
l
l
0.5
0.5
0.8
V
V
V
I
IH
Digital Input Current High Pins CSBI, SCKI, SDI; V
MODE
= V
REG
Pins CTRL, BOOST, V
MODE
, TOS
Pin WDT, Timed Out
–1
–1
–1
0
0
0
1
1
1
µA
µA
µA
I
IL
Digital Input Current Low Pins CSBI, SCKI, SDI; V
MODE
= V
REG
Pins CTRL, BOOST, V
MODE
, TOS
Pin WDT, Not Balancing
–1
–1
–1
0
0
0
1
1
1
µA
µA
µA