LTC3350 High Current Supercapacitor Backup Controller and System Monitor Description Features n n n n n n n n n n High Efficiency Synchronous Step-Down CC/CV Charging of One to Four Series Supercapacitors Step-Up Mode in Backup Provides Greater Utilization of Stored Energy in Supercapacitors 14-Bit ADC for Monitoring System Voltages/Currents, Capacitance and ESR Active Overvoltage Protection Shunts Internal Active Balancers—No Balance Resistors VIN: 4.
LTC3350 Table of Contents Features...................................................... 1 Applications................................................. 1 Typical Application ......................................... 1 Description.................................................. 1 Absolute Maximum Ratings............................... 3 Order Information........................................... 3 Pin Configuration........................................... 3 Electrical Characteristics...................
LTC3350 Absolute Maximum Ratings Pin Configuration VOUTM5 INFET VIN CAP_SLCT0 CAP_SLCT1 PFI PFO TOP VIEW 38 37 36 35 34 33 32 SCL 1 31 VOUTSP SDA 2 30 VOUTSN SMBALERT 3 29 INTVCC CAPGD 4 28 DRVCC 27 BGATE VC 5 CAPFB 6 26 BST 39 PGND OUTFB 7 25 TGATE 24 SW SGND 8 23 VCC2P5 RT 9 GPI 10 22 ICAP ITST 11 21 VCAP 20 OUTFET CAPRTN 12 CFN VCAPP5 CFP CAP4 CAP3 13 14 15 16 17 18 19 CAP1 VIN, VOUTSP, VOUTSN................................ –0.3V to 40V VCAP..............................
LTC3350 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VOUT = 12V, VDRVCC = VINTVCC unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switching Regulator VIN Input Supply Voltage IQ Input Quiescent Current (Note 4) VCAPFBHI Maximum Regulated VCAP Feedback Voltage l 4.5 35 l 1.188 1.176 1.200 1.200 1.212 1.224 V V 0.628 0.
LTC3350 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VOUT = 12V, VDRVCC = VINTVCC unless otherwise noted. SYMBOL PARAMETER CONDITIONS DCMAX Maximum Duty Cycle Step-Down Mode Step-Up Mode MIN TYP MAX UNITS 97 87 98 93 99.
LTC3350 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VOUT = 12V, VDRVCC = VINTVCC unless otherwise noted.
LTC3350 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VOUT = 12V, VDRVCC = VINTVCC unless otherwise noted.
LTC3350 Typical Performance Characteristics TA = 25°C, Application Circuit 4 unless otherwise noted. IIN and ICHARGE vs VIN CURRENT (A) 3.5 ICHARGE vs VCAP ICHARGE 2.3 2.50 IIN(MAX) = 2A IOUT = 0A VIN = 12V VIN = 24V VIN = 35V 1.25 IIN 11 21 16 26 VIN (V) 31 0 36 0 2 4 6 IIN 1.25 2.25 8.00 75 6.75 50 0 3.00 IIN(MAX) = 2A IOUT = 0A VIN = 12V VIN = 24V VIN = 35V 0 1.8 IOUT (A) 3.6 5.
LTC3350 Typical Performance Characteristics TA = 25°C, Application Circuit 4 unless otherwise noted. 4.90 IQ vs VIN, Pulse Skipping 5480 10.0 VGPI = 1V 5475 7.5 IDRVCC (mA) 4.75 5470 CODE IQ (mA) DRVCC Current vs Boost Inductor Current GPI Code vs Temperature 4.60 5465 4.45 4.30 10 15 25 20 VIN (V) 30 35 5455 –40 –6 28 62 96 3 1.5 4.5 3350 G14 INTVCC vs Charge Current 6 3350 G15 INTVCC vs Temperature 5.000 VIN = 12V 4.938 INTVCC (V) INTVCC (V) 0 IL (A) 4.938 4.875 4.
LTC3350 Pin Functions SCL (Pin 1): Clock Pin for the I2C/SMBus Serial Port. SDA (Pin 2): Bidirectional Data Pin for the I2C/SMBus Serial Port. SMBALERT (Pin 3): Interrupt Output. This open-drain output is pulled low when an alarm threshold is exceeded, and will remain low until the acknowledgement of the part’s response to an SMBus ARA. CAPGD (Pin 4): Capacitor Power Good. This open-drain output is pulled low when CAPFB is below 92% of its regulation point. VC (PIN 5): Control Voltage Pin.
LTC3350 Pin Functions current around the capacitor to provide balancing and prevent overvoltage. If not used this pin should be shorted to CAP1. The voltage between this pin and CAP1 is digitized and can be read in the meas_vcap2 register. VCAP (Pin 21): Supercapacitor Stack Voltage and Charge Current Sense Amplifier Negative Input. Connect this pin to the top of the supercapacitor stack. The voltage at this pin is digitized and can be read in the meas_vcap register.
LTC3350 Pin Functions INTVCC (Pin 29): Internal 5V Regulator Output. The control circuits and gate drivers (when connected to DRVCC) are powered from this supply. If not connected to DRVCC, decouple this pin to ground with a minimum 1μF low ESR tantalum or ceramic capacitor. VOUTSN (Pin 30): Input Current Limiting Amplifier Negative Input. A sense resistor, RSNSI, between VOUTSP and VOUTSN sets the input current limit. The maximum input current is 32mV/RSNSI.
LTC3350 Block Diagram 34 33 31 INFET VIN 32 VOUTSP 30 VOUTM5 20 VOUTSN + – +– D/A vcapfb_dac[3:0] 5 9 29 23 Vcapfb_dac CAPFB VREF OUTFB VCAPP5 CHARGE PUMP VCAP x37.5 + – + – + – ICAP IREF BST ICHG TGATE VC SW RT BIDIRECTIONAL SWITCHING CONTROLLER OSC INTVCC BGATE VREF BANDGAP 22 26 25 24 28 CAP4 2.5V LDO 21 DRVCC VOUTSP 5V LDO VCC2P5 19 30mV + – VREF CFM –+ + – IIN 7 INTVCC –5V LDO – VREF +x37.
LTC3350 Timing Diagram Definition of Timing for F/S Mode Devices on the I2C Bus SDA tLOW tf tSU(DAT) tr tHD(SDA) tf tBUF tr tSP SCL S tHD(SDA) tHD(DAT) tHIGH tSU(STA) Sr tSU(STO) P S 3350 TD S = START, Sr = REPEATED START, P = STOP Operation Introduction The LTC3350 is a highly integrated backup power controller and system monitor.
LTC3350 Operation VIN VOUT (TO SYSTEM) RSNSI INFET VIN INPUT CURRENT CONTROLLER VOUTSP VOUTSN – + LTC3350 +– 30mV + – VREF + – IIN TGATE BIDIRECTIONAL SWITCHING CONTROLLER CHARGE CURRENT CONTROLLER CAPACITOR VOLTAGE CONTROLLER BGATE STEP-DOWN MODE + – IREF + – ICHG + – ICAP 37.5 VCAP D/A RSNSC + VREF vcapfb_dac[3:0] CAPFB VC + + + 3350 F01 Figure 1.
LTC3350 Operation VCAP < VOUT VOUT (TO SYSTEM) OUTPUT VOLTAGE CONTROLLER VOUTSN LTC3350 – + VCAP > VOUT OUTFB VREF +– – + OUTFET 30mV BIDIRECTIONAL SWITCHING CONTROLLER STEP-UP MODE TGATE RSNSC + BGATE + ICAP + VCAP + 3350 F02 VC Figure 2. Power Path Block Diagram—Power Backup ideal diode shuts off, the synchronous controller will turn on immediately. If OUTFB is above 1.
LTC3350 Operation Gate Drive Supply (DRVCC) The bottom gate driver is powered from the DRVCC pin. It is normally connected to the INTVCC pin. An external LDO can also be used to power the gate drivers to minimize power dissipation inside the IC. See the Applications Information section for details. Undervoltage Lockout (UVLO) Internal undervoltage lockout circuits monitor both the INTVCC and DRVCC pins. The switching controller is kept off until INTVCC rises above 4.3V and DRVCC rises above 4.2V.
LTC3350 Operation When the difference between any two capacitor voltages exceeds about 10mV, the capacitor with the largest voltage is discharged with a resistive balancer at about 10mA until all capacitor voltages are within 10mV. The balancers are disabled in backup mode. Capacitor Shunt Regulators In addition to balancing, there is a need to protect each capacitor from overvoltage during charging.
LTC3350 Operation stack. This measurement is performed with minimal impact to the system, and can be done while the supercapacitor backup system is online. This measurement discharges the capacitor stack by a small amount (200mV). If input power fails during this test, the part will go into backup mode and the test will terminate. The capacitance test is performed only once the supercapacitors have finished charging.
LTC3350 Operation Details of the mon_status and msk_mon_status registers can be found in the Register Descriptions section of this data sheet. Charge Status Register The LTC3350 charger status register (chrg_status) contains data about the state of the charger, switcher, shunts, and balancers. Details of this register may be found in the Register Description sections of this data sheet.
LTC3350 Applications Information Digital Configuration Although the LTC3350 has extensive digital features, only a few are required for basic use. The shunt voltage should be programmed via the vshunt register if a value other than the default 2.7V is required. The capacitor voltage feedback reference defaults to 1.2V; it may be changed in the vcapfb_dac register. All other digital features are optional and used for monitoring. The ADC automatically runs and stores conversions to registers (e.g.
LTC3350 Applications Information The peak inductor current limit, IPEAK, is 80% higher than the maximum charge current and is equal to: IPEAK = 58mV RSNSC IINCHG = Note that the input current limit does not include the part’s quiescent and gate drive currents. The total current drawn by the part will be IIN(MAX) + IQ + IG, where IQ is the nonswitching quiescent current and IG is the gate drive current.
LTC3350 Applications Information VIN VCAP RFBC1 LTC3350 RPF1 CAPFB PFI RFBC2 VDD RPF2 LTC3350 RPF3 3350 F04 PFO Figure 4. VCAP Voltage Feedback Divider MN1 LTC3350 bidirectional controller switches to step-up mode is programmed using a resistor divider from the VIN pin to SGND via the PFI pin such that: ⎛ R ⎞ VIN = ⎜ 1+ PF1 ⎟ VPFI(TH) ⎝ RPF2 ⎠ where VPFI(TH) is 1.17V. Typical values for RPF1 and RPF2 are in the range of 40k to 1M. See Figure 5.
LTC3350 Applications Information Compensation The input current, charge current, VCAP voltage, and VOUT voltage loops all require a 1nF to 10nF capacitor from the VC node to ground. When using the output ideal diode and backing up to low voltages (<8V) use 8.2nF to 10nF on VC. When not using the output ideal diode 4.7nF to 10nF on VC is recommended. For very high backup voltages (>15V) 1nF to 4.7nF is recommended.
LTC3350 Applications Information Note the minimum VCAP voltage can also be limited by the peak inductor current limit (180% of maximum charge current) and the maximum duty cycle in step-up mode (~90%). where: γ MAX = 1+ 1– Optimizing Supercapacitor Energy Storage Capacity In most systems the supercapacitors will provide backup power to one or more DC/DC converters. A DC/DC converter presents a constant power load to the supercapacitor.
LTC3350 Applications Information maximum power transfer rule to maximize the utilization ratio. The minimum voltage in this case is: VCELL(MIN) = 4RSC •PBACKUP nη where η is the efficiency of the boost converter (~90% to 96%). For the backup equation, γ MAX and γ MIN, substitute PBACKUP/η for PBACKUP.
LTC3350 Applications Information Using the above equation, the inductor may be too large to provide a fast enough transient response to hold up VOUT when input power goes away. This occurs in cases where the maximum VIN can be high (e.g. 25V) and the backup voltage low (e.g. 6V). In these situations it would be best to choose an inductor that is smaller resulting in maximum peak-to-peak ripple as high as 40% of ICHG(MAX). Once the value for L is known, the type of inductor core must be selected.
LTC3350 Applications Information Because supercapacitors have low series resistance, it is important that CCAP be sized properly so that the bulk of the inductor current ripple flows through the filter capacitor and not the supercapacitor. It is recommended that: ⎛ ⎞ n •RSC 1 +RESR ⎟ ≤ ⎜⎝ 8C 5 ⎠ CAP • fSW where n is the number of supercapacitors in the stack and RSC is the ESR of each supercapacitor. The capacitance on VCAP can be a combination of bulk and high frequency capacitors.
LTC3350 Applications Information body diodes of the MOSFET switches from turning on, storing charge during the non-overlap time and requiring a reverse recovery period that could cost as much as 3% in efficiency at high VIN. One or both diodes can be omitted if the efficiency loss can be tolerated. The diode can be rated for about one-third to one-fifth of the full load current since it is on for only a fraction of the duty cycle.
LTC3350 Applications Information The external LDO should be powered from VOUT. It must be enabled after the INTVCC LDO has powered up and its output must be less than 5.5V. INTVCC should no longer be tied to DRVCC. Minimum On-Time Considerations Minimum on-time, tON(MIN), is the smallest time duration that the LTC3350 is capable of turning on the top MOSFET in step-down mode. It is determined by internal timing delays and the gate charge required to turn on the top MOSFET.
LTC3350 Applications Information Connect the drain of the top MOSFET and cathode of the top diode directly to the positive terminal of COUT. Connect the source of the bottom MOSFET and anode of the bottom diode directly to the negative terminal of COUT. This capacitor provides the AC current to the MOSFETs. 2. Ground is referenced to the negative terminal of the VCAP decoupling capacitor in step-down mode and to the negative terminal of the VOUT decoupling capacitor in step-up mode.
LTC3350 Register Map REGISTER SUB ADDR R/W BITS DESCRIPTION clr_alarms 0x00 R/W 15:0 Clear alarms register DEFAULT PAGE 0x0000 33 msk_alarms 0x01 R/W 15:0 Enable/mask alarms register 0x0000 33 msk_mon_status 0x02 R/W 9:0 Enable/mask monitor status alerts 0x0000 34 cap_esr_per 0x04 R/W 15:0 Capacitance/ESR measurement period 0x0000 34 vcapfb_dac 0x05 R/W 3:0 VCAP voltage reference DAC setting vshunt 0x06 R/W 15:0 Capacitor shunt voltage setting 0xF 34 0x3999 34
LTC3350 Register Descriptions clr_alarms (0x00) Clear Alarms Register: This register is used to clear alarms caused by exceeding a programmed limit. Writing a one to any bit in this register will cause its respective alarm to be cleared. The one written to this register is automatically cleared when its respective alarm is cleared.
LTC3350 Register Descriptions msk_mon_status (0x02) Mask Monitor Status Register: Writing a one to any bit in this register enables a rising edge of its respective bit in the mon_status register to trigger an SMBALERT.
LTC3350 Register Descriptions vin_uv_lvl (0x0B) 2.21mV per LSB VIN Undervoltage Level: This is an alarm threshold for the input voltage. If enabled, the voltage falling below this level will trigger an alarm and an SMBALERT. vin_ov_lvl (0x0C) 2.21mV per LSB VIN Overvoltage Level: This is an alarm threshold for the input voltage. If enabled, the voltage rising above this level will trigger an alarm and an SMBALERT. vcap_uv_lvl (0x0D) 1.
LTC3350 Register Descriptions ctl_reg (0x17) Control Register: Several Control Functions are grouped into this register. BIT(S) BIT NAME DESCRIPTION 0 ctl_strt_capesr Begin a capacitance and ESR measurement when possible; this bit clears itself once a cycle begins. 1 ctl_gpi_buffer_en A one in this bit location enables the input buffer on the GPI pin. With a zero in this location the GPI pin is measured without the buffer. 2 ctl_stop_capesr Stops an active capacitance/ESR measurement.
LTC3350 Register Descriptions mon_status (0x1C) Monitor Status: This register provides real time status information about the state of the monitoring system. Each bit is active high.
LTC3350 Register Descriptions meas_cap (0x1E) 336µF • RT/RTST per LSB Measured capacitor stack capacitance value. When ctl_cap_scale is set to one the constant is 3.36µF • RT/RTST. meas_esr (0x1F) RSNSC/64 per LSB Measured capacitor stack equivalent series resistance (ESR) value meas_vcap1 (0x20) 183.5µV per LSB Measured voltage between the CAP1 and CAPRTN pins. meas_vcap2 (0x21) 183.5µV per LSB Measured voltage between the CAP2 and CAP1 pins. meas_vcap3 (0x22) 183.
LTC3350 Typical Applications Application Circuit 1. 25V to 35V, 6.4A Supercapacitor Charger with 2A Input Current Limit and 28V, 50W Backup Mode RPF1 80.6k RPF2 4.53k R1 10k VOUT 28V 50W IN BACKUP C2 1µF C1 0.1µF 25V RISING THRESHOLD 22V FALLING THRESHOLD VDD RSNSI 0.016Ω MN1 SiS434DN VIN 25V TO 35V VIN INFET VOUTM5 VOUTSP VOUTSN OUTFET RPF3 39.2k PFI Si1555DL R2 10k R3 10k OUTFB DRVCC INTVCC R7 10k PFO CAPGD SMBALERT SCL SDA TGATE VCC2P5 BGATE RFBO1 665k C4 0.1µF RFBO2 29.4k C3 4.
LTC3350 Typical Applications Application Circuit 2. 11V to 20V, 16A Supercapacitor Charger with 6.4A Input Current Limit and 10V, 60W Backup Mode RPF1 806k VDD R2 10k R3 10k PFI OUTFB DRVCC INTVCC BST PFO CAPGD SMBALERT SCL SDA TGATE VCC2P5 BGATE DB B0540WS RFBO1 619k COUT2 22µF ×4 C3 4.7µF MN2 BSC026N02KS SW COUT1 82µF ×4 RFBO2 89.5k C4 0.1µF CB 0.47µF + L1 2.2µH RSNSC 0.
LTC3350 Typical Applications Application Circuit 4. 11V to 35V, 4A Supercapacitor Charger with 2A Input Current Limit and 10V, 1A Backup Mode RPF1 806k VDD R2 10k VIN INFET VOUTM5 VOUTSP VOUTSN OUTFET PFI OUTFB DRVCC INTVCC RPF2 100k R3 10k PFO CAPGD SMBALERT SCL SDA BST PFO CAPGD SMBALERT SCL SDA TGATE VCC2P5 BGATE CFBO1 100pF RFBO1 665k C4 0.1µF RFBO2 90.9k C3 4.7µF DB 1N4448HWT CB 0.
LTC3350 Typical Applications Application Circuit 6. 11V to 15V, 2.3A Zeta-SEPIC High Voltage Capacitor Charger with 2A Input Current Limit and 10V, 25W Backup Mode RPF1 158k R2 10k PFI OUTFB DRVCC INTVCC C3 4.7µF BST TGATE VCC2P5 LTC3350 GPI VC CB 0.1µF L1 4.7µH CB2 4.7µF MP1 Si7415DN ITST SGND PGND 1Ω 10µF 10µF L2 4.7µH MN2 FDMC86520L C6 470pF C7 10µF RSNSC 0.
LTC3350 Typical Applications Application Circuit 7. 4.8V to 12V, 10A Supercapacitor Charger with 6.4A Input Current Limit and 5V, 30W Backup Mode 50µs FALLING EDGE FILTER RPF1 30.1k VDD R1 10k R2 10k VIN INFET VOUTM5 VOUTSP VOUTSN OUTFET 1M PFI OUTFB DRVCC INTVCC 10pF MN4 Si1062X PFO CAPGD SMBALERT SCL SDA BST PFO CAPGD SMBALERT SCL SDA TGATE VCC2P5 BGATE DB B0540WS CB 0.1µF CFBO1 100pF RFBO1 665k C4 0.1µF RFBO2 210k C3 10µF MN2 SiS452DN SW COUT2 100µF ×6 L1 1µH MN3 SiS452DN COUT1 2.
LTC3350 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UHF Package 38-Lead Plastic QFN (5mm × 7mm) (Reference LTC DWG # 05-08-1701 Rev C) 0.70 ±0.05 5.50 ±0.05 5.15 ±0.05 4.10 ±0.05 3.00 REF 3.15 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 5.5 REF 6.10 ±0.05 7.50 ±0.05 RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ±0.10 0.75 ±0.05 PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 3.
LTC3350 Revision History REV DATE DESCRIPTION A 09/14 Modified IRMS equations in COUT and CCAP Capacitance section 27 Changed 5V to 6V in back-up mode under the Power MOSFET Selection section 28 Changed VCAP voltage reference DAC setting 32 Modified Application Circuit 42 Remove VCMI Common Mode Range from Electrical Characteristics 4 B C 01/15 08/15 PAGE NUMBER Remove Conditions on IPFO Falling and Rising 5 Change Analog-to-Digital Converter section 18 Change range in the General Pu
LTC3350 Typical Application 12V PCle Backup Controller RSNSI 0.016Ω MN1 SiS438DN VIN 11V TO 20V C2 1µF C1 0.1µF RPF1 806k VDD R1 10k R2 10k R3 10k MN4 SiS438DN VIN INFET VOUTM5 VOUTSP VOUTSN OUTFET PFI OUTFB DRVCC INTVCC RPF2 100k PFO CAPGD SMBALERT SCL SDA BST PFO CAPGD SMBALERT SCL SDA TGATE VCC2P5 BGATE RFBO1 649k C4 0.1µF RFBO2 162k C3 4.7µF CB 0.1µF MN2 BSZ060NE2LS SW CAP_SLCT0 CAP_SLCT1 C5 1µF ICAP VCAP CFP GPI CFN VCAPP5 VC T DB 1N4448HWT CFBO1 120pF L1 3.
