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LTC3413

3413fb

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

3A, 2MHz Monolithic

Synchronous Regulator for

DDR/QDR Memory Termination

■

High Efficiency: Up to 90%

■

±3A Output Current

■

Symmetrical Source and Sink Output Current Limit

■

Low R

DS(ON)

Internal Switch: 85mΩ

■

No Schottky Diode Required

■

2.25V to 5.5V Input Voltage Range

■

OUT

= V

REF

■

±1% Output Voltage Accuracy

■

Programmable Switching Frequency: Up to 2MHz

■

Power Good Output Voltage Monitor

■

Overtemperature Protected

■

Available in 16-Lead TSSOP Exposed Pad Package

The LTC

3413 is a high efficiency monolithic synchro-

nous step-down DC/DC converter utilizing a constant

frequency, current mode architecture. It operates from an

input voltage range of 2.25V to 5.5V and provides a

regulated output voltage equal to (0.5)V

REF

while sourcing

or sinking up to 3A of output current. An internal voltage

divider reduces component count and eliminates the need

for external resistors by dividing the reference voltage in

half. The internal synchronous power switch with 85mΩ

on-resistance increases efficiency and eliminates the need

for an external Schottky diode. Switching frequencies up

to 2MHz are set by an external resistor.

Forced-continuous operation in the LTC3413 reduces

noise and RF interference. Fault protection is provided by

an overcurrent comparator that limits output current dur-

ing both sourcing and sinking operations. Adjustable

compensation allows the transient response to be opti-

mized over a wide range of loads and output capacitors.

■

Bus Termination: DDR and QDR

Memory,

SSTL, HSTL, ...

■

Notebook Computers

■

Distributed Power Systems

Figure 1a. High Efficiency Bus Termination Supply

Figure 1b. Efficiency vs Load Current

PGOOD

SWV

REF

22μF

4.7M

309k

L1: VISHAY DALE IHLP-2525CZ-01 0.47

OUT

: TDK C4532X5R0J107M

2.5V

OUT

100μF

×2

3413 F01a

OUT

1.25V

±3A

0.47μH

LTC3413

PGNDRUN/SS

SGND

330pF

2200pF

5.11k

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 5481178.

LOAD CURRENT (A)

0.01

EFFICIENCY (%)

0.1 1 10

3413 F01b

100

= 2.5V

f = 1MHz

Summary of content (16 pages)

PAGE 1
LTC3413 3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®3413 is a high efficiency monolithic synchronous step-down DC/DC converter utilizing a constant frequency, current mode architecture. It operates from an input voltage range of 2.25V to 5.5V and provides a regulated output voltage equal to (0.5)VREF while sourcing or sinking up to 3A of output current.
PAGE 2
LTC3413 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) SVIN, PVIN Supply Voltages ........................ – 0.3V to 6V ITH, RUN/SS, VFB, PGOOD Voltages ........... – 0.3V to VIN VREF Voltage .............................................. – 0.3V to VIN SW Voltage .................................. – 0.3V to (VIN + 0.3V) Peak SW Sink and Source Current ........................ 7.2A Operating Ambient Temperature Range (Note 2) ..............................................
PAGE 3
LTC3413 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3413E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls.
PAGE 4
LTC3413 U W TYPICAL PERFOR A CE CHARACTERISTICS Frequency vs Input Voltage Frequency vs ROSC 4500 4000 1050 VIN = 3.3V TA = 25°C Frequency vs Temperature 1010 TA = 25°C 1008 1040 1006 2500 2000 1500 FREQUENCY (kHz) FREQUENCY (kHz) FREQUENCY (kHz) 3500 3000 VIN = 3.3V 1030 1020 1010 1000 1004 1002 1000 998 996 994 1000 500 992 0 990 54 154 254 354 454 554 654 754 854 954 ROSC (kΩ) 2.5 3 3.5 4 4.
PAGE 5
LTC3413 U U U PI FU CTIO S SVIN (Pin 1): Signal Input Supply. Decouple this pin to SGND with a capacitor. SVIN must be greater or equal to PVIN, however, the difference between SVIN and PVIN must be less than 0.5V. PGOOD (Pin 2): Power Good Output. Open-drain logic output that is pulled to ground when the output voltage is not within ±10% of regulation point. ITH (Pin 3): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage.
PAGE 6
LTC3413 U OPERATIO Main Control Loop The LTC3413 is a monolithic, constant frequency, current mode step-down DC/DC converter that is capable of sourcing and sinking current at the output. During normal operation, the internal top power switch (P-channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current comparator trips and turns off the top power MOSFET.
PAGE 7
LTC3413 U W U U APPLICATIO S I FOR ATIO The basic LTC3413 application circuit is shown in Figure 1a. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Having a lower ripple current reduces the core losses in the inductor, the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current.
PAGE 8
LTC3413 U W U U APPLICATIO S I FOR ATIO Table 1 shows some recommended surface mount inductors for LTC3413 applications. Table 1. Recommended Surface Mount Inductors Manufacturer Part Number Value (μH) DCR (mΩ) Murata LQH55DNR47M01 0.47 13.0 Vishay/Dale IHLP2525CZPJR47M01 0.47 4.2 Pulse P1166.681T 0.44 6.0 Cooper SD20-R47 0.47 20.0 CIN and COUT Selection The input capacitance, CIN, is needed to filter the trapezoidal wave current at the source of the top MOSFET.
PAGE 9
LTC3413 U W U U APPLICATIO S I FOR ATIO dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming In most applications, VOUT is connected directly to VFB. The output voltage will be equal to one-half of the voltage on the VREF pin for this case. VOUT = VREF 2 If a different output voltage relationship is desired, an external resistor divider from VOUT to VFB can be used.
PAGE 10
LTC3413 U W U U APPLICATIO S I FOR ATIO high to low to high again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2.
PAGE 11
LTC3413 U W U U APPLICATIO S I FOR ATIO Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD(ESR), where ESR is the effective series resistance of COUT.
PAGE 12
LTC3413 U W U U APPLICATIO S I FOR ATIO VIN 2.5V 1 RPG 100k PGOOD RITH 5.11k CITH CC 2200pF 100pF X7R 2 3 4 RSS 4.7M CSS 330pF X7R PVIN PGOOD SW ITH SWVFB VFB PGND CIN1** 100μF 16 15 14 13 L1* 0.47μH VOUT 1.25V ±3A LTC3413 5 ROSC 309k SVIN 6 7 8 RT PGND VREF SW RUN/SS SW SGND PVIN 12 11 COUT** 100μF ×2 10 9 GND CIN2** 100μF 3413 F03 *VISHAY DALE IHLP-2525CZ-01 0.47μH **TDK C4532X5R0J107M Figure 3.
PAGE 13
LTC3413 U W U U APPLICATIO S I FOR ATIO (4a) Top Layer (4b) Bottom Layer (4c) PCB Photo Figure 4.
PAGE 14
LTC3413 U TYPICAL APPLICATIO 1.25V, ±3A DDR Memory Termination Supply at 1MHz VIN 3.3V 1 RPG 100k 2 PGOOD RITH 5.11k 3 CITH CC 2200pF 100pF X7R 4 SVIN PVIN PGOOD SW ITH SWVFB VFB PGND CIN1** 100μF 16 15 14 13 L1* 0.47μH LTC3413 5 ROSC 309k 6 2.5V RSS 4.7M 7 CSS 330pF X7R 8 RT PGND VREF SW RUN/SS SW SGND PVIN 12 11 VOUT 1.25V ±3A COUT** 100μF ×2 10 9 GND CIN2** 100μF 3413 TA01 *VISHAY DALE IHLP-2525CZ-01 0.
PAGE 15
LTC3413 U PACKAGE DESCRIPTIO FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663, Exposed Pad Variation BA) 4.90 – 5.10* (.193 – .201) 2.74 (.108) 2.74 (.108) 16 1514 13 12 1110 6.60 ±0.10 9 2.74 (.108) 4.50 ±0.10 2.74 6.40 (.108) (.252) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2.
PAGE 16
LTC3413 U TYPICAL APPLICATIO 3.3V to 0.75V, ±3A HSTL Application VIN 3.3V 1 RPG 100k PGOOD RITH 10k CITH CC 2200pF 100pF X7R 2 3 4 1.5V RSS 4.7M CSS 330pF X7R PVIN PGOOD SW ITH SWVFB VFB PGND 15 14 13 L1* 0.47μH VOUT 0.75V ±3A LTC3413 5 ROSC 309k SVIN CIN1** 100μF 16 6 7 8 RT PGND VREF SW RUN/SS SW SGND PVIN 12 11 COUT1† 22μF + COUT2†† 470μF 10 9 GND CIN2** 100μF 3413 TA02 *VISHAY DALE IHLP-2525CZ-01 0.