Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - DC/DC voltage regulator Holder QFN 20

LTC3612

3612fb

For more information www.linear.com/LTC3612

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

3A, 4MHz Monolithic

Synchronous Step-Down

DC/DC Converter

The LTC

3612 is a low quiescent current monolithic syn-

chronous buck regulator using a current mode, constant

frequency architecture. The no-load DC supply current

in sleep mode is only 70µA while maintaining the output

voltage (Burst Mode operation) at no load, dropping to

zero current in shutdown. The 2.25V to 5.5V input supply

voltage range makes the L

TC3612 ideally suited for single

Li-Ion as well as fixed low voltage input applications. 100%

duty cycle capability provides low dropout operation,

extending the operating time in battery-powered systems.

The operating frequency is externally programmable up to

4MHz, allowing the use of small surface mount inductors.

For switching noise-sensitive applications, the LTC3612

can be synchronized to an external clock at up to 4MHz.

Forced continuous mode operation in the LTC3612 reduces

noise and RF interference. Adjustable compensation allows

the transient response to be optimized over a wide range

of loads and output capacitors.

The internal synchronous switch increases efficiency and

eliminates the need for an external catch diode, saving

external components and board space. The LTC3612 is

offered in a leadless 20-pin 3mm × 4mm QFN or a thermally

enhanced 20-pin TSSOP package.

Efficiency and Power Loss vs Load Current

3A Output Current

2.25V to 5.5V Input Voltage Range

Low Output Ripple Burst Mode

Operation: I

= 70µA

±1% Output Voltage Accuracy

Output Voltage Down to 0.6V

High Efficiency: Up to 95%

Low Dropout Operation: 100% Duty Cycle

Shutdown Current: ≤1µA

Adjustable Switching Frequency: Up to 4MHz

Optional Active Voltage Positioning (AVP) with

Internal Compensation

Selectable Pulse-Skipping/Forced Continuous/

Burst Mode Operation with Adjustable Burst Clamp

Programmable Soft-Start

Inputs for Start-Up Tracking or External Reference

DDR Memory Mode, I

OUT

= ±1.5A

Available in Thermally Enhanced 20-Pin

(3mm × 4mm) QFN and TSSOP Packages

Point-of-Load Supplies

Distributed Power Supplies

Portable Computer Systems

DDR Memory Termination

Handheld Devices

L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks

of Linear Technology Corporation. All other trademarks are the property of their respective

owners. Protected by U.S. Patents, including 6580258, 5481178, 5994885, 6304066, 6498466,

6611131.

RUN

TRACK/SS

RT/SYNC

PGOOD

ITH

SGND

PGND

2.5V TO 5.5V

IN_DRV

DDR

LTC3612 SW

560nH

665k

210k

3612 TA01a

22µF

×2

MODE V

47µF

OUT

2.5V

OUTPUT CURRENT (mA)

EFFICIENCY (%)

POWER LOSS (W)

100

1 100 1000 10000

3612 TA01b

0.001

0.1

0.01

= 5V

= 3.3V

= 2.8V

Summary of content (30 pages)

PAGE 1
LTC3612 3A, 4MHz Monolithic Synchronous Step-Down DC/DC Converter DESCRIPTION FEATURES n n n n n n n n n n n n n n n 3A Output Current 2.25V to 5.5V Input Voltage Range Low Output Ripple Burst Mode® Operation: IQ = 70µA ±1% Output Voltage Accuracy Output Voltage Down to 0.
PAGE 2
LTC3612 ABSOLUTE MAXIMUM RATINGS (Note 1) PVIN, SVIN, PVIN_DRV Voltages...................... –0.3V to 6V SW Voltage...................................–0.3V to (PVIN + 0.3V) ITH, RT/SYNC Voltages................ –0.3V to (SVIN + 0.3V) DDR, TRACK/SS Voltages............ –0.3V to (SVIN + 0.3V) MODE, RUN, VFB Voltages........... –0.3V to (SVIN + 0.3V) PGOOD Voltage............................................. –0.3V to 6V Operating Junction Temperature Range (Notes 2, 11).......................................
PAGE 3
LTC3612 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 3.3V, RT/SYNC = SVIN, unless otherwise specified. SYMBOL PARAMETER VIN Operating Voltage Range VUVLO Undervoltage Lockout Threshold VFB Feedback Voltage Internal Reference CONDITIONS MIN l 2.25 SVIN Ramping Down SVIN Ramping Up l l 1.
PAGE 4
LTC3612 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 3.3V, RT/SYNC = SVIN, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP PGOOD Power Good Voltage Windows TRACK/SS = SVIN, Entering Window VFB Ramping Up VFB Ramping Down –3.5 3.
PAGE 5
LTC3612 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.3V, RT/SYNC = SVIN, unless otherwise noted. Efficiency vs Load Current (VMODE = 0V) 100 100 VOUT = 1.8V 90 Efficiency vs Load Current 100 VOUT = 1.2V 90 80 70 70 70 50 40 30 20 0 1 10 100 1000 OUTPUT CURRENT (mA) 60 50 40 30 20 VIN = 5V VIN = 3.3V VIN = 2.5V 10 EFFICIENCY (%) 80 60 10000 1 10 100 1000 OUTPUT CURRENT (mA) 3612 G01 Burst Mode EXTERNAL CLAMP = 0.
PAGE 6
LTC3612 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.3V, RT/SYNC = SVIN, unless otherwise noted. Pulse-Skipping Mode Operation VOUT 20mV/DIV VOUT 20mV/DIV VOUT 200mV/DIV IL 1A/DIV IL 200mA/DIV IL 500mA/DIV VOUT = 1.8V IOUT = 75mA VMODE = 3.3V 20µs/DIV 3612 G09 VOUT = 1.8V IOUT = 100mA VMODE = 1.5V 3612 G10 1µs/DIV VOUT = 1.8V 50µs/DIV ILOAD = 100mA TO 3A VMODE = 3.
PAGE 7
LTC3612 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.3V, RT/SYNC = SVIN, unless otherwise noted. Tracking Up/Down in Forced Continuous Mode, DDR Pin Tied to 0V Internal Start-Up in Forced Continuous Mode RUN 1V/DIV VOUT 500mV/DIV IL 1A/DIV PGOOD 2V/DIV VOUT 1V/DIV VTRACK/SS 500mV/DIV PGOOD 2V/DIV VOUT = 1.8V IOUT = 3A VMODE = 1.5V 3612 G17 500µs/DIV 2ms/DIV VOUT = 0V TO 1.8V IOUT = 3A VTRACK/SS = 0V TO 0.7V VMODE = 1.
PAGE 8
LTC3612 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.3V, RT/SYNC = SVIN, unless otherwise noted. Frequency vs Resistor on RT/SYNC Pin Frequency vs Temperature 1.0 4500 FREQUENCY VARIATION (%) 4000 FREQUENCY (kHz) 3500 3000 2500 2000 1500 1000 0.5 0 –0.5 –1.0 500 0 0 –1.5 –60 –50 –30 –10 10 30 50 70 90 110 130 150 TEMPERATURE (°C) 200 400 600 800 1000 1200 1400 RESISTOR ON RT/SYNC PIN (kΩ) 3612 G24 3612 G23 Switch Leakage vs Temperature, Main Switch 1.0 7000 0.
PAGE 9
LTC3612 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.3V, RT/SYNC = SVIN, unless otherwise noted. Dynamic Supply Current vs Temperature without AVP Mode Start-Up from Shutdown with Prebiased Output (Forced Continuous Mode) VOUT Short to GND, Forced Continuous Mode PGOOD 5V/DIV 10 1 VOUT 1V/DIV FORCED CONTINUOUS MODE VOUT 500mV/DIV IL 2A/DIV PULSE-SKIPPING MODE IL 2A/DIV VOUT = 2.5V IOUT = 0A VMODE = 1.5V Burst Mode OPERATION 0.1 3612 G30 50µs/DIV 20µs/DIV PREBIASED VOUT = 2.2V VOUT = 1.
PAGE 10
LTC3612 PIN FUNCTIONS (QFN/FE) DDR (Pin 1/Pin 8): DDR Mode Pin. Tying the DDR pin to SVIN selects DDR mode and TRACK/SS can be used as an external reference input. If DDR is tied to SGND, the internal 0.6V reference will be used. RT/SYNC (Pin 2/Pin 9): Oscillator Frequency. This pin provides three ways of setting the constant switching frequency: 1. Connecting a resistor from RT/SYNC to ground will set the switching frequency based on the resistor value. 2.
PAGE 11
LTC3612 FUNCTIONAL BLOCK DIAGRAM SGND SVIN ITH + BANDGAP AND BIAS RUN RT/SYNC PVIN ITH SENSE COMPARATOR INTERNAL COMPENSATION OSCILLATOR – SVIN – 0.3V PVIN_DRV CURRENT SENSE R – PMOS CURRENT COMPARATOR ITH LIMIT + 0.3V – FOLDBACK AMPLIFIER – SLOPE COMPENSATION + 0.6V + VFB + ERROR AMPLIFIER – BURST COMPARATOR SLEEP – + DRIVER + MODE TRACK/SS SOFT-START SW 0.555V + SW SW – LOGIC REVERSE COMPARATOR + 0.
PAGE 12
LTC3612 OPERATION Main Control Loop Mode Selection The LTC3612 is a monolithic, constant frequency, current mode step-down DC/DC converter. During normal operation, the internal top power switch (P-channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current comparator trips and turns off the top power switch. The peak inductor current at which the current comparator trips is controlled by the voltage on the ITH pin.
PAGE 13
LTC3612 OPERATION Burst Mode Operation—External Clamp Dropout Operation Connecting the MODE pin to a voltage in the range of 0.45V to 0.8V enables Burst Mode operation with external clamp. During this mode of operation the minimum voltage on the ITH pin is externally set by the voltage on the MODE pin. It is recommended to use Burst Mode operation with an internal clamp for temperatures above 85°C ambient.
PAGE 14
LTC3612 OPERATION If the output voltage drops below 50% of its nominal value, the clamp voltage at ITH pin is lowered causing the maximum peak inductor current to decrease gradually with the output voltage. When the output voltage reaches 0V the clamp voltage at the ITH pin drops to 40% of the clamp voltage during normal operation. The short-circuit peak inductor current is determined by the minimum on-time of the LTC3612, the input voltage and the inductor value.
PAGE 15
LTC3612 APPLICATIONS INFORMATION Frequency Synchronization Inductor Selection The LTC3612’s internal oscillator can be synchronized to an external frequency by applying a square wave clock signal to the RT/SYNC pin. During synchronization, the top switch turn-on is locked to the falling edge of the external frequency source. The synchronization frequency range is 300kHz to 4MHz. During synchronization all operation modes can be selected.
PAGE 16
LTC3612 APPLICATIONS INFORMATION inductor ripple current and consequently output voltage ripple. Do not allow a ferrite core to saturate and select external inductors respecting the temperature range of the application! Different core materials and shapes will change the size/ current and price/current relationship of an inductor.
PAGE 17
LTC3612 APPLICATIONS INFORMATION the capacitance is adequate for filtering. The output ripple ∆VOUT is determined by:   1 ∆VOUT ≤ ∆IL •  ESR + 8 • fSW •COUT   where fOSC = operating frequency, COUT = output capacitance and ∆IL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ∆IL increases with input voltage.
PAGE 18
LTC3612 APPLICATIONS INFORMATION Burst Clamp Programming Internal and External Compensation If the voltage on the MODE pin is less than 0.8V, Burst Mode operation is enabled. The regulator loop response can be checked by looking at the load current transient response. Switching regulators take several cycles to respond to a step in DC load current. When a load step occurs, VOUT shifts by an amount equal to ∆ILOAD(ESR), where ESR is the effective series resistance of COUT .
PAGE 19
LTC3612 APPLICATIONS INFORMATION AVP Mode Fast load transient response, limited board space and low cost are typical requirements of microprocessor power supplies. A microprocessor has typical full load step with very fast slew rate. The voltage at the microprocessor must be held to about ±0.1V of nominal in spite of these load current steps. Since the control loop cannot respond this fast, the output capacitors must supply the load current until the control loop can respond.
PAGE 20
LTC3612 APPLICATIONS INFORMATION the RUN pin by either adding a 1MΩ resistor or a 100kΩ resistor, plus a Schottky diode, to SVIN. After pulling the RUN pin high, the chip enters a soft start-up state. This type of soft start-up behavior is set by the TRACK/SS pin: 1. Tying TRACK/SS to SVIN selects the internal soft-start circuit. This circuit ramps the output voltage to the final value within 1ms. 2.
PAGE 21
LTC3612 APPLICATIONS INFORMATION Efficiency Considerations VOUT1 VOUT2 R4 R4 VFB2 R2 LTC3612 TRACK/SS2 The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement.
PAGE 22
LTC3612 APPLICATIONS INFORMATION VFB PIN 0.6V VOLTAGE 0V 0.6V TRACK/SS PIN VOLTAGE 0.2V 0V RUN PIN VOLTAGE SVIN PIN VOLTAGE VIN 0V VIN 0V TIME SHUTDOWN SOFT-START STATE STATE tSS > 1ms RUN STATE REDUCED SWITCHING FREQUENCY DOWN TRACKING STATE RUN STATE 3612 F07 UP TRACKING STATE Figure 7. DDR Pin Not Tied to SVIN 0.45V VFB PIN 0.3V VOLTAGE 0V EXTERNAL VOLTAGE REFERENCE 0.45V 0.45V TRACK/SS 0.3V PIN VOLTAGE 0.
PAGE 23
LTC3612 APPLICATIONS INFORMATION The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. To obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss.
PAGE 24
LTC3612 APPLICATIONS INFORMATION COUT will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. For this design, a 68µF (or 47µF plus 22µF) ceramic capacitor is used with a X5R or X7R dielectric. CIN should be sized for a maximum current rating of: IRMS = 3A • 1.8V  3.6V  •  – 1 = 1.5ARMS 3.6V  1.8V  Decoupling the PVIN with two 22µF capacitors, is adequate for most applications.
PAGE 25
LTC3612 TYPICAL APPLICATIONS General Purpose Buck Regulator Using Ceramic Capacitors, 2.25MHz VIN 2.25V TO 5.5V C2 22µF C1 22µF RF 24Ω CF 1µF RSS 4.7M CSS 10nF RC 43k CC 220pF PGOOD CC1 10pF R5A 1M R4 100k PVIN SVIN RUN PVIN_DRV DDR TRACK/SS RT/SYNC LTC3612 SW PGOOD SGND ITH PGND MODE VFB R2 196k R5B 1M L1: VISHAY IHLP-2020BZ 0.47µH Efficiency vs Output Current L1 470nH CO1 47µF VOUT 1.
PAGE 26
LTC3612 TYPICAL APPLICATIONS Master and Slave for Coincident Tracking Outputs Using a 1MHz External Clock VIN 2.25V TO 5.5V C2 22µF C1 22µF 4.7M 10nF 1MHz CLOCK RC1 15k PGOOD CC1 470pF CC2 10pF RF1 24Ω CF1 1µF R5 100k 4.7M PVIN SVIN RUN PVIN_DRV DDR TRACK/SS RT/SYNC LTC3612 SW PGOOD SGND ITH PGND MODE VFB R2 357k 4.7M C5 22µF C6 22µF CHANNEL 1 MASTER CO11 47µF R1 715k CO12 22µF VOUT1 1.
PAGE 27
LTC3612 PACKAGE DESCRIPTION UDC Package 20-Lead Plastic QFN (3mm × 4mm) (Reference LTC DWG # 05-08-1742 Rev Ø) 0.70 ±0.05 3.50 ± 0.05 2.10 ± 0.05 1.50 REF 2.65 ± 0.05 1.65 ± 0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.50 REF 3.10 ± 0.05 4.50 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 ± 0.10 0.75 ± 0.05 1.50 REF 19 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER 20 0.40 ± 0.10 1 PIN 1 TOP MARK (NOTE 6) 4.00 ± 0.10 2 2.65 ± 0.
PAGE 28
LTC3612 PACKAGE DESCRIPTION FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev J) Exposed Pad Variation CB 6.40 – 6.60* (.252 – .260) 3.86 (.152) 3.86 (.152) 20 1918 17 16 15 14 13 12 11 6.60 ±0.10 2.74 (.108) 4.50 ±0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.25 REF 0° – 8° 0.65 (.0256) BSC 0.50 – 0.75 (.020 – .030) NOTE: 1.
PAGE 29
LTC3612 REVISION HISTORY REV DATE DESCRIPTION A 08/10 Updated Temperature Range in Order Information B 12/13 PAGE NUMBER 2 Edited Electrical Characteristics table and updated Note 2 3, 4 Updated text in graphs G19, G31 7, 9 Updated Pin 16/Pin 3 and Pin 21/Pin 21 text 10 Updated Functional Block Diagram 11 Updated Burst Mode Operation—External Clamp section 13 Updated Internal and External Compensation section 18 Updated Soft-Start section 19 Updated Timing Resistor equation in Design
PAGE 30
LTC3612 TYPICAL APPLICATION DDR Termination with Ratiometric Tracking of VDD, 1MHz VIN 3.3V C1 22µF VDD 1.8V C2 22µF R6 562k R3 100k R7 187k R8 365k PGOOD PVIN PVIN_DRV DDR L1 1µH LTC3612 PGOOD RC 6k R4 1M SVIN RUN TRACK/SS RT/SYNC CC 2.2nF R5 1M CC1 10pF SW C4 100µF SGND PGND ITH MODE R1 200k VFB C3 22pF R2 200k L1: COILCRAFT DO3316T C5 47µF VTT 0.9V ±1.