Datasheet

LTC3646/LTC3646-1
7
36461fa
For more information www.linear.com/LTC3646
pin FuncTions
(DFN/MSOP)
SGND (Pin 1/Pin 1): Analog Ground Pin. This pin should
have a low noise connection to the reference ground.
V
FB
(Pin 2/Pin 2): Output Voltage Feedback Pin. Input to
the error amplifier that compares the feedback voltage with
the internal 0.6V reference. Connect this pin to a resistor
divider network to program the desired output voltage.
ITH (Pin 3/Pin 3): Error Amplifier Output and Switching
Regulator Compensation Point. Connect this pin to appro
-
priate external components to compensate the regulator
loop frequency response. Connect this pin to INTV
CC
to
use the default internal compensation.
RT (Pin 4/Pin 4): Oscillator Frequency Program Pin. Con
-
nect an external resistor between 450k and 30k from this
pin to SGND to program the switching frequency from
200kHz to 3.0MHz. When RT is connected to INTV
CC
, the
switching frequency will be 2.25MHz. Do not float RT.
V
ON
(Pin 5/Pin 5): On-Time Voltage Input Pin. This pin
provides information about the output voltage (V
OUT
) to
the on-time control loop. Connect this pin to the regulated
output to make the on-time proportional to the output
voltage.
PGOOD (Pin 6/Pin 6): Power Good Output Pin. PGOOD
is pulled to ground
when the voltage at the V
FB
pin is not
within 7.5% (typical) of the internal 0.6V reference. PGOOD
becomes high impedance once the voltage at the V
FB
pin
returns to within 5% of the internal reference.
MODE/SYNC (Pin 7/Pin 7): Mode Selection and External
Clock Input Pin. This pin forces the LTC3646 into forced
continuous operation when tied to ground, and high ef
-
ficiency Burst
Mode operation when tied to INTV
CC
. When
driven with an external clock, the LTC3646 will adjust the
top switch on-time to match the switching frequency to
the applied clock frequency and the part will operate in
forced continuous mode. During start-up or external clock
synchronization, the operating mode will be as described
in the Applications Information section.
PVIN (Pin 8/Pins 9, 10): Supply Pin for the Power Switch.
This pin connects directly to top switch. Closely decouple
this pin to PGND with a 10µF or greater, low ESR capacitor.
SW (Pin 9/Pin 11): Switch Node Output Pin. Connect this
pin to the switch side of the external inductor and boost
capacitor.
BOOST (Pin 10/Pin 12): Boosted Supply Pin. A boosted
voltage is generated at this pin by connecting a capacitor
between this pin and the
SW pin. The normal operation
voltage swing of this pin ranges from INTV
CC
to PVIN
+ INTV
CC
. When necessary, connect the cathode of an
external boost diode to this pin. See the Boost Capacitor
and Diode section.
INTV
CC
(Pin 11/Pin 13): Internal 5.0V Regulator Output
Pin. This pin should be decoupled to PGND with a 4.7µF or
greater low ESR capacitor. When necessary, connect the
anode of an external boost diode to this pin. The internal
regulator is disabled when the RUN pin is low.
EXTV
CC
(Pin 12/Pin 14): Use this input pin to power the
chip’s low voltage control circuitry if a high efficiency
supply between 4.5V and 6.0V is available. Otherwise,
connect this pin to SGND. See the Applications Informa
-
tion section for further information.
RUN
(Pin 13/Pin 15): Regulator Enable Pin. Enables chip
operation by applying a voltage greater than V
RUN
.
SVIN (Pin 14/Pin 16): Power Supply Input for Internal
Circuitry. Closely decouple this pin to SGND with a greater
than 1µF low ESR capacitor. SVIN pin voltage should equal
PVIN in order to correctly calculate on the on time and
maintain constant frequency operation.
PGND (Exposed Pad Pin 15/Exposed Pad Pin 17): Power
Path Ground
Pin. The exposed pad must be well soldered
to
the PCB to provide a low impedance electrical connec-
tion to ground and rated thermal performance.