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LTC3704

3704fb

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

Wide Input Range, No R

SENSE

Positive-to-Negative DC/DC Controller

The LTC

3704 is a wide input range, current mode,

positive-to-negative DC/DC controller that drives an

N-channel power MOSFET and requires very few external

components. Intended for low to high power applications,

it eliminates the need for a current sense resistor by

utilizing the power MOSFET’s on-resistance, thereby maxi-

mizing efficiency.

The IC’s operating frequency can be set with an external

resistor over a 50kHz to 1MHz range, and can be synchro-

nized to an external clock using the MODE/SYNC pin.

Burst Mode operation at light loads, a low minimum

operating supply voltage of 2.5V and a low shutdown

quiescent current of 10μA make the LTC3704 ideally

suited for battery-operated systems.

For applications requiring constant frequency operation,

the Burst Mode operation feature can be defeated using

the MODE/SYNC pin. Higher than 36V switch voltage

applications are possible with the LTC3704 by connecting

the SENSE pin to a resistor in the source of the power

MOSFET.

The LTC3704 is available in the 10-lead MSOP package.

■

High Efficiency Operation (No Sense

Resistor Required)

■

Wide Input Voltage Range: 2.5V to 36V

■

Current Mode Control Provides Excellent Transient

Response

■

High Maximum Duty Cycle (Typ 92%)

■

±1% Internal Voltage Reference

■

±2% RUN Pin Threshold with 100mV Hysteresis

■

Micropower Shutdown: I

= 10μA

■

Programmable Switching Frequency

(50kHz to 1MHz) with One External Resistor

■

Synchronizable to an External Clock Up to 1.3 × f

OSC

■

User-Controlled Pulse Skip or Burst Mode

Operation

■

Internal 5.2V Low Dropout Voltage Regulator

■

Capable of Operating with a Sense Resistor for High

Output Voltage Applications (V

>36V)

■

Small 10-Lead MSOP Package

■

SLIC Power Supplies

■

Telecom Power Supplies

■

Portable Electronic Equipment

■

Cable and DSL Modems

■

Router Supplies

RUN

NFB

FREQ

MODE/SYNC

SENSE

INTV

GATE

GND

LTC3704

80.6k

VCC

4.7μF

, C

: TDK C5750X5R1C476M

OUT

: TDK C5750X5R0J107M

VCC

: TAIYO YUDEN LMK316BJ475ML

•

L1*

L2*

OUT

100μF

(X2)

5V to 15V

OUT

–5.0V

3A to 5A

GND

D1: MBRD835L (ON SEMICONDUCTOR)

L1, L2: BH ELECTRONICS BH510-1009

M1: Si4884 (SILICONIX/VISHAY)

4.7nF

47μF

3704 TA01

•

FB1

1.21k

FB2

3.65k

Conversion Efficiency

OUTPUT CURRENT (A)

0.001

EFFICIENCY (%)

0.1

100

3704 TA01b

0.01 1.0

= 15V

= 5V

= 10V

Figure 1. High Efficiency Positive to Negative Supply

, LTC, LT and LTM are registered trademarks of Linear Technology Corporation. Burst

Mode is a registered trademark of Linear Technology Corporation. No R

SENSE

is a

registered trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners. Protected by U.S. Patents including 5847554, 5731694.

Summary of content (28 pages)

PAGE 1
LTC3704 Wide Input Range, No RSENSETM Positive-to-Negative DC/DC Controller U FEATURES DESCRIPTIO ■ The LTC®3704 is a wide input range, current mode, positive-to-negative DC/DC controller that drives an N-channel power MOSFET and requires very few external components. Intended for low to high power applications, it eliminates the need for a current sense resistor by utilizing the power MOSFET’s on-resistance, thereby maximizing efficiency.
PAGE 2
LTC3704 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) VIN Voltage ............................................... – 0.3V to 36V INTVCC Voltage ........................................... – 0.3V to 7V INTVCC Output Current ........................................ 50mA GATE Voltage ........................... – 0.3V to VINTVCC + 0.3V ITH Voltage ............................................... – 0.3V to 2.7V NFB Voltage .............................................. –2.7V to 2.
PAGE 3
LTC3704 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = VINTVCC = 5V, VRUN = 1.5V, RFREQ = 80k, VMODE/SYNC = 0V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP Oscillator Frequency RFREQ = 80k 250 300 MAX UNITS Oscillator fOSC Oscillator Frequency Range 350 kHz 1000 kHz 92 97 % 1.25 1.
PAGE 4
LTC3704 U W TYPICAL PERFOR A CE CHARACTERISTICS NFB Voltage vs Temp NFB Voltage Line Regulation NFB Pin Current vs Temperature 8.0 –1.231 –1.25 7.9 7.8 –1.23 NFB CURRENT (μA) NFB VOLTAGE (V) NFB VOLTAGE (V) –1.24 –1.230 –1.22 7.7 7.6 7.5 7.4 7.3 7.2 7.1 –1.21 –50 –25 7.0 –50 –25 –1.
PAGE 5
LTC3704 U W TYPICAL PERFOR A CE CHARACTERISTICS RUN Thresholds vs VIN RUN Thresholds vs Temperature RT vs Frequency 1000 1.40 1.4 1.3 1.2 0 10 20 VIN (V) 30 1.35 RT (kΩ) RUN THRESHOLDS (V) RUN THRESHOLDS (V) 1.5 1.30 1.25 10 1.
PAGE 6
LTC3704 U U U PI FU CTIO S RUN (Pin 1): The RUN pin provides the user with an accurate means for sensing the input voltage and programming the start-up threshold for the converter. The falling RUN pin threshold is nominally 1.248V and the comparator has 100mV of hysteresis for noise immunity. When the RUN pin is below this input threshold, the IC is shut down and the VIN supply current is kept to a low value (typ 10μA). The Absolute Maximum Rating for the voltage on this pin is 7V.
PAGE 7
LTC3704 W BLOCK DIAGRA RUN + BIAS AND START-UP CONTROL SLOPE COMPENSATION 1 C2 – 1.248V 100mV HYSTERESIS (1.348V RISING) FREQ V-TO-I 4 VIN OSC 9 0.62V IOSC MODE/SYNC INTVCC 5 NFB GATE 200k 3 50k 200k – S Q GND R + BUFFER PWM LATCH 0.30V – 1.230V + 7 LOGIC EA SENSE + + – gm 10 C1 – BURST COMPARATOR CURRENT COMPARATOR ITH V-TO-I 2 INTVCC 5.2V 8 ILOOP LDO RLOOP 1.230V SLOPE 1.230V – 2.
PAGE 8
LTC3704 U OPERATIO Main Control Loop The LTC3704 is a constant frequency, current mode controller for DC/DC positive-to-negative converter applications. The LTC3704 is distinguished from conventional current mode controllers because the current control loop can be closed by sensing the voltage drop across the power MOSFET switch instead of across a discrete sense resistor, as shown in Figure 2.
PAGE 9
LTC3704 U OPERATIO minimum on-time (about 175ns). Below this output current level, the converter will begin to skip cycles in order to maintain output regulation. Figures 3 and 4 show the light load switching waveforms for Burst Mode and Pulse-Skip Mode operation for the converter in Figure 1. buffered ITH burst clamp is removed, allowing the ITH pin to directly control the current comparator from no load to full load. With no load, the ITH pin is driven below 0.
PAGE 10
LTC3704 U W U U APPLICATIO S I FOR ATIO 2V TO 7V MODE/ SYNC tMIN = 25ns 0.8T GATE T T = 1/fO D = 40% INTVCC Regulator Bypassing and Operation An internal, P-channel low dropout voltage regulator produces the 5.2V supply which powers the gate driver and logic circuitry within the LTC3704, as shown in Figure 7. The INTVCC regulator can supply up to 50mA and must be bypassed to ground immediately adjacent to the IC pins with a minimum of 4.7μF tantalum or ceramic capacitor.
PAGE 11
LTC3704 U W U U APPLICATIO S I FOR ATIO cause the LTC3704 to exceed its maximum junction temperature rating. The junction temperature can be estimated using the following equations: IQ(TOT) ≈ IQ + f • QG PIC = VIN • (IQ + f • QG) TJ = TA + PIC • RTH(JA) The total quiescent current IQ(TOT) consists of the static supply current (IQ) and the current required to charge and discharge the gate of the power MOSFET. The 10-pin MSOP package has a thermal resistance of RTH(JA) = 120°C/W.
PAGE 12
LTC3704 U W U U APPLICATIO S I FOR ATIO The resistor R1 is typically chosen to be less than 1M. Absolute Maximum Rating for this pin! The RUN pin can be connected to the input voltage through an external 1M resistor, as shown in Figure 8c, for “always on” operation. For applications where the RUN pin is only to be used as a logic input, the user should be aware of the 7V VIN + R2 RUN RUN COMPARATOR + BIAS AND START-UP CONTROL 6V INPUT SUPPLY – OPTIONAL FILTER CAPACITOR R1 1.
PAGE 13
LTC3704 U W U U APPLICATIO S I FOR ATIO Applications Circuits Peak and Average Input and Switch Currents A simple positive-to-negative application circuit for the LTC3704 is shown in Figure 1. The basic operation of this circuit is shown in Figure 9. During the on-time the inductor currents flow through the switch, and during the off-time these currents flow through the output diode.
PAGE 14
LTC3704 U W U U APPLICATIO S I FOR ATIO internal ramp compensation (at duty cycles above 50%), and the converter operation will approach voltage mode (ramp compensation reduces the gain of the current loop). If too small an inductor is used, but the converter is still operating in CCM (near critical conduction mode), the internal ramp compensation may be inadequate to prevent subharmonic oscillation.
PAGE 15
LTC3704 U W U U APPLICATIO S I FOR ATIO the initial equations for IL1(PEAK) and IL2(PEAK). If a coupled inductor is used, make sure that the minimum saturation current for the parallel configuration exceeds the maximum switch current, or: ⎛ ILSAT (MIN) ≥ – ⎜ 1 + ⎝ 1 χ⎞ ⎟ • IO(MAX) • 2⎠ 1 – DMAX The saturation current rating should be checked at minimum input voltage (which results in the highest average inductor current) and maximum load current.
PAGE 16
LTC3704 U W U U 2.0 200 ρT NORMALIZED ON RESISTANCE MAXIMUM CURRENT SENSE VOLTAGE (mV) APPLICATIO S I FOR ATIO 150 100 50 0 0 0.2 0.5 0.4 DUTY CYCLE 0.8 1.0 1.5 1.0 0.5 0 – 50 50 100 0 JUNCTION TEMPERATURE (°C) 150 3704 F12 3704 F11 Figure 11. Maximum SENSE Threshold Voltage vs Duty Cycle Figure 12.
PAGE 17
LTC3704 U W U U APPLICATIO S I FOR ATIO The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(CA)). This value of TJ can then be compared to the original, assumed value used in the iterative calculation process. 1A/DIV Output Diode Selection To maximize efficiency, a fast switching diode with low forward drop and low reverse leakage is desired.
PAGE 18
LTC3704 U W U U APPLICATIO S I FOR ATIO 1 (1 – DMAX ) VO IRMS(COUT ) ≥ • • 12 f L2 It should be noted that these equations assume no coupling between the inductors. If the inductors are wound on the same core, the ripple currents at the input and output can be tuned to very low values, and so the equations above would be extremely conservative. It is highly recommended that the user experiment in the lab with the same magnetics and capacitors which will be used in production.
PAGE 19
LTC3704 U W U U APPLICATIO S I FOR ATIO Aluminum electrolytic and dry tantalum capacitors are both available in surface mount packages. In the case of tantalum, it is critical that the capacitors have been surge tested for use in switching power supplies. An excellent choice is AVX TPS series of surface mount tantalum. Also, ceramic capacitors are now available with extremely low ESR, ESL and high ripple current ratings.
PAGE 20
LTC3704 U W U U APPLICATIO S I FOR ATIO regulator feedback loop acts on the resulting error amp output signal to return VO to its steady-state value. During this recovery time, VO can be monitored for overshoot or ringing that would indicate a stability problem. A second, more severe transient can occur when connecting loads with large (> 1μF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with CO, causing a nearly instantaneous drop in VO.
PAGE 21
LTC3704 U W U U APPLICATIO S I FOR ATIO PD = IO(MAX) • VF Assuming a maximum junction temperature of 125°C and a forward voltage of approximately 0.33V at 3A (the maximum output current at VIN = 15V), this diode will dissipate 1W at full load. The diode selected was the MBRD835L from On Semiconductor, packaged in a D-Pak. C1 1nF 7. The DC coupling capacitor must be capable of handling an RMS current of: ID(PEAK) = –IO(MAX) • VIN 5V to 15V • R1 154k 1% R2 68.1k 1% 2 10 VIN LTC3704 3 4 5 CC1 4.
PAGE 22
LTC3704 U W U U APPLICATIO S I FOR ATIO VOUT (AC) 10mV/DIV VOUT (AC) 100mV/DIV IL2 (DC) 1A/DIV IOUT (DC) 1A/DIV 2A 0.5A 1μs/DIV VIN = 5V IOUT = –2V 250μs/DIV VIN = 5V 3704 F18 3704 F19 Figure 19. Load Step Response at VIN = 5V for the Circuit in Figure 15 Figure 18. Output Ripple Voltage and Inductor Current for the Circuit in Figure 15 VOUT 1V/DIV VOUT (AC) 100mV/DIV VOUT IOUT 1A/DIV IOUT 2A IOUT (DC) 1A/DIV 0.5A VIN = 15V 250μs/DIV 3704 F20 Figure 20.
PAGE 23
LTC3704 U W U U APPLICATIO S I FOR ATIO PC Board Layout Checklist source of the power MOSFET or the bottom terminal of the sense resistor, 4) the negative terminal of the input capacitor and 5) at least one via to the ground plane immediately adjacent to Pin 6. The ground trace on the top layer of the PC board should be as wide and short as possible to minimize series resistance and inductance. 1.
PAGE 24
LTC3704 U W U U APPLICATIO S I FOR ATIO 2. Beware of ground loops in multiple layer PC boards. Try to maintain one central ground node on the board and use the input capacitor to avoid excess input ripple for high output current power supplies. If the ground plane is to be used for high DC currents, choose a path away from the small-signal components. 3. Place the CVCC capacitor immediately adjacent to the INTVCC and GND pins on the IC package.
PAGE 25
LTC3704 U W U U APPLICATIO S I FOR ATIO VIN 3V to 5V • L1* 1 L2* 10 SENSE RUN 2 VIN ITH LTC3704 3 RC 14.7k VOUT –8.0V 1.2A to 2.5A • NFB 4 8 INTVCC FREQ 5 GATE MODE/SYNC 9 GND M1 7 CDC 22μF X5R COUT 100μF X5R 6 CC1 4.7nF D1 RT 80.6k 1% CVCC 4.7μF X5R RFB1 2.49k 1% CIN 47μF X5R GND RFB2 13.7k 1% 3704 F24 D1: DIODES INC B320B L1, L2: BH ELECTRONICS BH 510-1009 M1: SILICONIX Si9426 Figure 24. 3V to 5V Input, –8V at 1.
PAGE 26
LTC3704 U W U U APPLICATIO S I FOR ATIO GND • R1 49.9k 1% UV + = 5.4V UV – = 5.0V 4 + CIN 220μF 16V TPS VOUT1 –24V 200mA • T1* 1, 2, 3 5 NFB • 6 INTVCC FREQ GATE MODE/SYNC RFB1 2.49k 1% + C4 10μF 25V X5R D4 10BQ060 + C5 10μF 25V X5R • LTC3704 RT 120k D3 10BQ060 + COUT 3.3μF 100V VIN ITH CC1 1nF C3 10μF 25V X5R SENSE RUN RC 82k + VIN 7V TO 12V R2 150k 1% CR 1nF CC2 100pF D2 10BQ060 f = 200kHz RFB2 45.3k 1% GND + C1 4.7μF 10V X5R IRL2910 RS 0.
PAGE 27
LTC3704 U PACKAGE DESCRIPTIO MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.50 0.305 ± 0.038 (.0197) (.0120 ± .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.497 ± 0.076 (.0196 ± .003) REF 10 9 8 7 6 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 1 2 3 4 5 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.86 (.
PAGE 28
LTC3704 U TYPICAL APPLICATIO High Efficiency Positive-to-Negative Converter C9 1nF OPTIONAL R4 154k 1% VIN 5V TO 15V R5 68.1k 1% L1* ITH RC 9.1k VIN LTC3704 NFB CC2 330pF CC1 10nF FREQ RT 80.6k 1% CDC 22μF 25V X7R SENSE MODE/SYNC INTVCC CIN 47μF 16V GATE GND L2* CVCC 4.7μF M1 D1 VOUT –5V 5A COUT1 100μF 6.3V + RUN COUT2 150μF 6.3V GND 3704 TA02 R1 1.21k 1% R2 3.