Datasheet

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LTC3736

3736fa

, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode

is a registered trademark of Linear Technology Corporation. No R

SENSE

is a trademark of

Linear Technology Corporation. All other trademarks are the property of their respective

owners. Protected by U.S. Patents including 5481178, 5929620, 6144194, 6580258,

6304066, 6611131, 6498466.

Dual 2-Phase, No R

SENSE

Synchronous Controller

with Output Tracking

High Efficiency, 2-Phase, Dual Synchronous DC/DC Step-Down Converter

■

No Current Sense Resistors Required

■

Out-of-Phase Controllers Reduce Required

Input Capacitance

■

Tracking Function

■

Wide V

Range: 2.75V to 9.8V

■

Constant Frequency Current Mode Operation

■

0.6V ±1.5% Voltage Reference

■

Low Dropout Operation: 100% Duty Cycle

■

True PLL for Frequency Locking or Adjustment

■

Selectable Burst Mode

/Forced Continuous Operation

■

Auxiliary Winding Regulation

■

Internal Soft-Start Circuitry

■

Power Good Output Voltage Monitor

■

Output Overvoltage Protection

■

Micropower Shutdown: I

= 9µA

■

Tiny Low Profile (4mm × 4mm) QFN and Narrow

SSOP Packages

The LTC

3736 is a 2-phase dual synchronous step-down

switching regulator controller with tracking that drives

external complementary power MOSFETs using few exter-

nal components. The constant frequency current mode

architecture with MOSFET V

sensing eliminates the

need for sense resistors and improves efficiency. Power

loss and noise due to the ESR of the input capacitance are

minimized by operating the two controllers out of phase.

Burst Mode operation provides high efficiency at light loads.

100% duty cycle capability provides low dropout operation,

extending operating time in battery-powered systems.

The switching frequency can be programmed up to 750kHz,

allowing the use of small surface mount inductors and ca-

pacitors. For noise sensitive applications, the LTC3736

switching frequency can be externally synchronized from

250kHz to 850kHz. Burst Mode operation is inhibited dur-

ing synchronization or when the SYNC/FCB pin is pulled low

in order to reduce noise and RF interference. Automatic soft-

start is internally controlled.

The LTC3736 is available in the tiny thermally enhanced

(4mm × 4mm) QFN package or 24-lead SSOP narrow

package.

■

One or Two Lithium-Ion Powered Devices

■

Notebook and Palmtop Computers, PDAs

■

Portable Instruments

■

Distributed DC Power Systems

SENSE1

LTC3736

SGND

SENSE2

TG1 TG2

SW1 SW2

BG1 BG2

PGND PGND

FB1

FB2

220pF

OUT1

2.5V

OUT2

1.8V

47µF

15k

220pF

15k

59k

187k

118k

2.2µH

TH1

3736 TA01a

TH2

10µF

×2

2.75V TO 9.8V

LOAD CURRENT (mA)

EFFICIENCY (%)

100

1 100 1000 10000

3736 TA01b

= 3.3V

FIGURE 16 CIRCUIT

OUT

= 2.5V

= 5V

= 4.2V

Efficiency vs Load Current

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

Summary of content (28 pages)

PAGE 1
LTC3736 Dual 2-Phase, No RSENSETM, Synchronous Controller with Output Tracking U FEATURES DESCRIPTIO ■ The LTC®3736 is a 2-phase dual synchronous step-down switching regulator controller with tracking that drives external complementary power MOSFETs using few external components. The constant frequency current mode architecture with MOSFET VDS sensing eliminates the need for sense resistors and improves efficiency.
PAGE 2
LTC3736 W W W AXI U U ABSOLUTE RATI GS (Note 1) Input Supply Voltage (VIN) ........................ – 0.3V to 10V PLLLPF, RUN/SS, SYNC/FCB, TRACK, SENSE1+, SENSE2+, IPRG1, IPRG2 Voltages ................. – 0.3V to (VIN + 0.3V) VFB1, VFB2, ITH1, ITH2 Voltages .................. – 0.3V to 2.4V SW1, SW2 Voltages ............ –2V to VIN + 1V or 10V Max PGOOD ..................................................... – 0.3V to 10V TG1, TG2, BG1, BG2 Peak Output Current (<10µs) .....
PAGE 3
LTC3736 ELECTRICAL CHARACTERISTICS The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified. PARAMETER CONDITIONS Output Voltage Load Regulation ITH = 0.9V (Note 5) ITH = 1.7V VFB1,2 Input Current (Note 5) MIN TYP MAX UNITS 0.12 –0.12 0.5 –0.5 % % 10 50 nA TRACK Input Current TRACK = 0.6V 10 50 nA Overvoltage Protect Threshold Measured at VFB 0.66 0.68 0.
PAGE 4
LTC3736 U W TYPICAL PERFOR A CE CHARACTERISTICS Efficiency and Power Loss vs Load Current 100 10 95 90 80 75 0.1 70 65 60 VIN = 5V SYNC/FCB = VIN 1 VOUT = 3.3V VOUT = 2.5V VOUT = 1.8V VOUT = 1.2V 10 100 1000 LOAD CURRENT (mA) POWER LOSS (W) EFFICIENCY (%) VOUT AC-COUPLED 100mV/DIV 1 85 50 Load Step (Forced Continuous Mode) Load Step (Burst Mode Operation) FIGURE 15 CIRCUIT 55 TA = 25°C unless otherwise noted. VOUT AC-COUPLED 100mV/DIV IL 2A/DIV IL 2A/DIV 0.01 100µs/DIV VIN = 3.
PAGE 5
LTC3736 U W TYPICAL PERFOR A CE CHARACTERISTICS Maximum Current Sense Voltage vs ITH Pin Voltage 40 90 85 20 80 FORCED CONTINUOUS (SYNC/FCB = 0V) PULSE SKIPPING MODE (SYNC/FCB = 550kHz) 75 70 65 60 0 FIGURE 15 CIRCUIT VIN = 5V VOUT = 2.5V 55 –20 50 0.5 0.607 2 1 1.5 ITH VOLTAGE (V) 1 10 100 1000 LOAD CURRENT (mA) 10000 Shutdown (RUN) Threshold vs Temperature 1.0 0.601 0.599 0.597 0.595 0.593 0.591 20 40 60 –60 –40 –20 0 TEMPERATURE (°C) RUN/SS PULL-UP CURRENT (µA) 0.8 0.7 0.6 0.5 0.4 0.
PAGE 6
LTC3736 U W TYPICAL PERFOR A CE CHARACTERISTICS Shutdown Quiescent Current vs Input Voltage SHUTDOWN CURRENT (µA) RUN/SS Start-Up Current vs Input Voltage 0.9 RUN/SS = 0V RUN/SS PIN PULL-UP CURRENT (µA) 20 18 16 14 12 10 8 6 4 2 0 2 3 4 8 6 5 7 INPUT VOLTAGE (V) 9 10 3736 G17 U U U PI FU CTIO S TA = 25°C unless otherwise noted. RUN/SS = 0V 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.
PAGE 7
LTC3736 U U U PI FU CTIO S (UF/GN Package) For auxiliary winding applications, connect to a resistor divider from the auxiliary output. To synchronize with an external clock using the PLL, apply a CMOS compatible clock with a frequency between 250kHz and 850kHz. To select Burst Mode operation at light loads, tie this pin to VIN. Grounding this pin selects forced continuous operation, which allows the inductor current to reverse.
PAGE 8
LTC3736 W FU CTIO AL DIAGRA U U (Controller 1) VIN SENSE1+ CIN RS1 CLK1 S TG1 MP1 Q R SWITCHING LOGIC AND BLANKING CIRCUIT OV1 SC1 FCB PGND SW1 ANTISHOOT THROUGH L1 VOUT1 SENSE1+ COUT1 BG1 MN1 PGND SLEEP1 IREV1 SLOPE1 SW1 – ICMP SENSE1+ + IPROG1 SHDN – + VFB1 R1B EAMP + BURSTDIS R1A – 0.3V 0.6V ITH1 EXTSS INTSS – RITH1 SLEEP1 + 0.12V – VFB1 – PGND + SC1 BURSTDIS 0.15V + OV1 VFB1 OVP IREV1 – CITH1 SCP RICMP + 0.
PAGE 9
LTC3736 W FU CTIO AL DIAGRA (Controller 2) U SENSE2+ RS2 CLK2 S VIN TG2 MP2 Q R SWITCHING LOGIC AND BLANKING CIRCUIT OV2 SC2 FCB PGND SW2 ANTISHOOT THROUGH L2 SENSE2 VOUT2 + COUT2 BG2 MN2 PGND SLEEP2 IREV2 SLOPE2 SW2 – ICMP SENSE2+ + SHDN – + R2B VFB2 EAMP + BURSTDIS R2A VOUT1 – 0.3V TRACK RTRACKB 0.6V RTRACKA ITH2 – RITH2 SLEEP2 + SC2 BURSTDIS + 0.12V – VFB2 – PGND CITH2 SCP 0.15V TRACK + OV2 VFB2 IREV2 OVP – + 0.
PAGE 10
LTC3736 U OPERATIO (Refer to Functional Diagram) Main Control Loop The LTC3736 uses a constant frequency, current mode architecture with the two controllers operating 180 degrees out of phase. During normal operation, the top external P-channel power MOSFET is turned on when the clock for that channel sets the RS latch, and turned off when the current comparator (ICMP) resets the latch.
PAGE 11
LTC3736 U OPERATIO (Refer to Functional Diagram) When a controller is enabled for Burst Mode operation, the inductor current is not allowed to reverse. Hence, the controller operates discontinuously. The reverse current comparator (RICMP) senses the drain-to-source voltage of the bottom external N-channel MOSFET. This MOSFET is turned off just before the inductor current reaches zero, preventing it from reversing and going negative.
PAGE 12
LTC3736 (Refer to Functional Diagram) Dropout Operation When the input supply voltage (VIN) decreases towards the output voltage, the rate of change of the inductor current while the external P-channel MOSFET is on (ON cycle) decreases. This reduction means that the P-channel MOSFET will remain on for more than one oscillator cycle if the inductor current has not ramped up to the threshold set by the EAMP on the ITH pin.
PAGE 13
LTC3736 U OPERATIO (Refer to Functional Diagram) With 2-phase operation, the two controllers of the LTC3736 are operated 180 degrees out of phase. This effectively interleaves the current pulses coming from the topside MOSFET switches, greatly reducing the time where they overlap and add together.
PAGE 14
LTC3736 U W U U APPLICATIO S I FOR ATIO The typical LTC3736 application circuit is shown in Figure 13. External component selection for each of the LTC3736’s controllers is driven by the load requirement and begins with the selection of the inductor (L) and the power MOSFETs (MP and MN). Power MOSFET Selection Each of the LTC3736’s two controllers requires two external power MOSFETs: a P-channel MOSFET for the topside (main) switch and an N-channel MOSFET for the bottom (synchronous) switch.
PAGE 15
LTC3736 U W U U APPLICATIO S I FOR ATIO MOSFET manufacturers, and in the variations in QG and tD(OFF) with gate drive (VIN) voltage, the P-channel MOSFET ultimately should be evaluated in the actual LTC3736 application circuit to ensure proper operation. ρT NORMALIZED ON RESISTANCE 2.0 1.5 1.0 0.5 0 – 50 50 100 0 JUNCTION TEMPERATURE (°C) 150 3736 F04 Figure 4.
PAGE 16
LTC3736 U W U U APPLICATIO S I FOR ATIO operation improves efficiency by reducing MOSFET switching losses, both gate charge loss and transition loss. However, lower frequency operation requires more inductance for a given amount of ripple current. The internal oscillator for each of the LTC3736’s controllers runs at a nominal 550kHz frequency when the PLLLPF pin is left floating and the SYNC/FCB pin is a DC low or high.
PAGE 17
LTC3736 U W U U APPLICATIO S I FOR ATIO than ferrite. A reasonable compromise from the same manufacturer is Kool Mµ. Toroids are very space efficient, especially when you can use several layers of wire. Because they lack a bobbin, mounting is more difficult. However, designs for surface mount are available which do not increase the height significantly.
PAGE 18
LTC3736 U W U U APPLICATIO S I FOR ATIO where f is the operating frequency, COUT is the output capacitance and IRIPPLE is the ripple current in the inductor. The output ripple is highest at maximum input voltage since IRIPPLE increases with input voltage. 3.3V OR 5V RUN/SS RUN/SS D1 CSS CSS 3736 F06 Setting Output Voltage The LTC3736 output voltages are each set by an external feedback resistor divider carefully placed across the output, as shown in Figure 5.
PAGE 19
LTC3736 U W U U APPLICATIO S I FOR ATIO VOUT2 VOUT1 OUTPUT VOLTAGE OUTPUT VOLTAGE VOUT1 VOUT2 3736 F07b,c TIME TIME (7b) Coincident Tracking (7c) Ratiometric Tracking Figures 7b and 7c.
PAGE 20
LTC3736 U W U U APPLICATIO S I FOR ATIO 2.4V RLP CLP SYNC/ FCB EXTERNAL OSCILLATOR PLLLPF DIGITAL PHASE/ FREQUENCY DETECTOR OSCILLATOR 3736 F09 Figure 9. Phase-Locked Loop Block Diagram If the external clock frequency is greater than the internal oscillator’s frequency, fOSC, then current is sourced continuously from the phase detector output, pulling up the PLLLPF pin. When the external clock frequency is less than fOSC, current is sunk continuously, pulling down the PLLLPF pin.
PAGE 21
LTC3736 U W U U APPLICATIO S I FOR ATIO VOUT VIN LTC3736 R6 TG + L1 1:N 1/2 LTC3736 VAUX ITH 1µF R2 + DFB1 VFB R1 VOUT DFB2 SYNC/FCB R5 3736 F11 SW + COUT BG Figure 11. Foldback Current Limiting 3736 F10 If VAUX drops below this value, the FCB voltage forces temporary continuous switching operation until VAUX is again above its minimum. Table 3 summarizes the different states in which the SYNC/FCB pin can be used Table 3 SYNC/FCB PIN CONDITION 0V to 0.
PAGE 22
LTC3736 U W U U APPLICATIO S I FOR ATIO continuous mode is selected and the duty cycle falls below the minimum on-time requirement, the output will be regulated by overvoltage protection. Other losses, including CIN and COUT ESR dissipative losses and inductor core losses, generally account for less than 2% total additional loss. Efficiency Considerations Checking Transient Response The efficiency of a switching regulator is equal to the output power divided by the input power times 100%.
PAGE 23
LTC3736 U W U U APPLICATIO S I FOR ATIO deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25)(CLOAD). Thus a 10µF capacitor would require a 250µs rise time, limiting the charging current to about 200mA.
PAGE 24
LTC3736 U W U U APPLICATIO S I FOR ATIO MP1 L1 VOUT1 COUT1 MN1 + RL1 VIN RIN CIN + MP2 L2 COUT2 MN2 BOLD LINES INDICATE HIGH, SWITCHING CURRENT LINES. KEEP LINES TO A MINIMUM LENGTH VOUT2 + RL2 3736 F14 Figure 14.
PAGE 25
LTC3736 U TYPICAL APPLICATIO S RFB1A 59k RFB1B 187k CITH1A 100pF VIN 3.3V CITH1 470pF 22 23 24 1 2 3 4 21 SENSE1+ SW1 PGND IPRG1 BG1 VFB1 SYNC/FCB ITH1 TG1 IPRG2 PGND PLLLPF SGND TG2 LTC3736EUF 5 VIN RUN/SS RITH1 22k RVIN 10Ω CIN 22µF 20 19 18 17 16 15 RITH2 22k CSS 10nF CITH2A 100pF MN1 Si3460DV VOUT1 2.5V 2A D1 COUT1 22µF ×2 14 13 BG2 9 12 PGND PGOOD 7 11 SENSE2+ VFB2 8 ITH2 10 6 TRACK SW2 PGND CITH2 CVIN 470pF 1µF L1 1.
PAGE 26
LTC3736 U TYPICAL APPLICATIO 2-Phase, 550kHz, Dual Output Synchronous DC/DC Converter with Different Power Stage Input Supplies RFB1B 187k CITH1A 100pF VIN1 5V CIN 10µF ×2 CITH1 220pF 22 23 24 1 2 3 4 SW1 SENSE1+ PGND IPRG1 BG1 VFB1 SYNC/FCB ITH1 TG1 IPRG2 PGND PLLLPF SGND TG2 LTC3736EUF 5 14 VIN RUN/SS RITH1 15k RVIN 10Ω CITH2 CVIN 220pF 1µF CITH2B 100pF RITH2 15k CSS 10nF RFB2A 59k L1 1.
PAGE 27
LTC3736 U PACKAGE DESCRIPTIO UF Package 24-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1697) 0.75 ± 0.05 4.00 ± 0.10 (4 SIDES) 0.70 ±0.05 BOTTOM VIEW—EXPOSED PAD 0.23 TYP R = 0.115 (4 SIDES) TYP 23 24 PIN 1 TOP MARK (NOTE 5) 0.38 ± 0.10 1 2 4.50 ± 0.05 2.45 ± 0.05 (4 SIDES) 3.10 ± 0.05 2.45 ± 0.10 (4-SIDES) PACKAGE OUTLINE (UF24) QFN 0603 0.200 REF 0.25 ±0.05 0.50 BSC 0.25 ± 0.05 0.00 – 0.05 0.50 BSC NOTE: 1.
PAGE 28
LTC3736 U TYPICAL APPLICATIO 2-Phase, Single Output Synchronous DC/DC Converter (3.3VIN to 1.8VOUT at 8A) RFB1B 118k CITH1A 100pF 22 23 24 1 2 3 4 RITH1 CITH1 15k 220pF VIN 3.3V CIN 10µF ×2 RVIN 10Ω CVIN 1µF CSS CITH2B 4.7nF 22pF SW1 SENSE1+ PGND IPRG1 BG1 VFB1 SYNC/FCB ITH1 TG1 IPRG2 PGND PLLLPF SGND TG2 LTC3736EUF 5 VIN RUN/SS 21 20 19 18 17 16 15 1M BG2 9 PGND PGOOD 7 SENSE2+ V 8 FB2 ITH2 6 TRACK SW2 PGND 13 12 11 L1 1.5µH MP1 MN1 Si7540DP VOUT 1.