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LTC3851-1

38511fa

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

Synchronous

Step-Down Switching

Regulator Controller

The LTC

3851-1 is a high performance synchronous

step-down switching regulator controller that drives

an all N-channel synchronous power MOSFET stage. A

con stant frequency current mode architecture allows a

phase-lockable frequency of up to 750kHz.

OPTI-LOOP compensation allows the transient response

to be optimized over a wide range of output capacitance

and ESR values. The LTC3851-1 features a precision 0.8V

reference and a power good indicator. A wide 4V to 38V (40V

absolute maximum) input supply range encompasses most

battery conﬁ gurations and intermediate bus voltages.

The TK/SS pin ramps the output voltage during start-up

and shutdown with coincident or ratiometric tracking.

Current foldback limits MOSFET heat dissipation during

short-circuit conditions. The MODE/PLLIN pin selects

among Burst Mode operation, pulse skipping mode or

continuous inductor current mode at light loads and allows

the IC to be synchronized to an external clock.

The LTC3851-1 is identical to the LTC3851 except that the

LIM

pin is replaced by PGOOD.

High Efﬁ ciency Synchronous Step-Down Converter

Wide V

Range: 4V to 38V Operation

SENSE

or DCR Current Sensing

±1% Output Voltage Accuracy

Power Good Output Voltage Monitor

Phase-Lockable Fixed Frequency: 250kHz to 750kHz

Dual N-Channel MOSFET Synchronous Drive

Very Low Dropout Operation: 99% Duty Cycle

Adjustable Output Voltage Soft-Start or Tracking

Output Current Foldback Limiting

Output Overvoltage Protection

OPTI-LOOP

Compensation Minimizes C

OUT

Selectable Continuous, Pulse-Skipping or

Burst Mode

Operation at Light Loads

Low Shutdown I

: 20µA

OUT

Range: 0.8V to 5.5V

Thermally Enhanced 16-Lead MSOP

or 3mm × 3mm QFN Package

Automotive Systems

Telecom Systems

Industrial Equipment

Distributed DC Power Systems

Efﬁ ciency and Power Loss

vs Load Current

L, LT, LTC, LTM, Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology

Corporation. All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6304066,

6498466, 6580258, 6611131.

PGO0D

RUN

TK/SS

FREQ/PLLFLTR

INTV

MODE/PLLIN

SENSE

–

GND

0.047µF

0.1µF

4.7µF

3.01k

LTC3851-1

22µF

4.5V TO 38V

OUT

3.3V

15A

38511 TA01a

0.68µH

330pF

2200pF

0.1µF

330µF

BOOST

15k

154k

48.7k

30.1k

82.5k

100k

LOAD CURRENT (mA)

EFFICIENCY (%)

POWER LOSS (mW)

100 1000 10000 100000

38511TA01b

100

1000

100

10000

= 12V

OUT

= 3.3V

EFFICIENCY

POWER LOSS

Summary of content (28 pages)

PAGE 1
LTC3851-1 Synchronous Step-Down Switching Regulator Controller DESCRIPTION FEATURES n n n n n n n n n n n n n n n The LTC®3851-1 is a high performance synchronous step-down switching regulator controller that drives an all N-channel synchronous power MOSFET stage. A constant frequency current mode architecture allows a phase-lockable frequency of up to 750kHz.
PAGE 2
LTC3851-1 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (VIN) ......................... 40V to –0.3V Topside Driver Voltage (BOOST) ................ 46V to –0.3V Switch Voltage (SW) ..................................... 40V to –5V INTVCC , (BOOST – SW), RUN, PGOOD ........ 6V to –0.3V TK/SS .................................................... INTVCC to –0.3V SENSE+, SENSE–.......................................... 6V to –0.3V MODE/PLLIN, FREQ/PLLFLTR ............... INTVCC to –0.
PAGE 3
LTC3851-1 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating junction temperature range, otherwise speciﬁcations are at TA = 25°C. VIN = 15V, VRUN = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loops VIN Input Operating Voltage Range 4 VFB Regulated Feedback Voltage ITH = 1.
PAGE 4
LTC3851-1 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating junction temperature range, otherwise speciﬁcations are at TA = 25°C. VIN = 15V, VRUN = 5V unless otherwise noted.
PAGE 5
LTC3851-1 TYPICAL PERFORMANCE CHARACTERISTICS Load Step (Burst Mode Operation) Efﬁciency and Power Loss vs Input Voltage 100 10000 EFFICIENCY, IOUT = 5A 95 POWER LOSS, IOUT = 5A 90 85 1000 EFFICIENCY, IOUT = 0.5A 80 POWER LOSS, IOUT = 0.5A POWER LOSS (mW) EFFICIENCY (%) Load Step (Forced Continuous Mode) ILOAD 5A/DIV 0.2A TO 7.5A ILOAD 5A/DIV 0.2A TO 7.
PAGE 6
LTC3851-1 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Current Sense Threshold vs Common Mode Voltage INTVCC Line Regulation 90 90 5.1 ILOAD = 0mA 80 4.9 ILOAD = 25mA 70 80 4.5 4.3 4.1 3.9 3.7 60 60 VSENSE (mV) 4.7 50 40 30 8 12 16 20 24 28 32 INPUT VOLTAGE (V) 36 40 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VSENSE COMMON MODE VOLTAGE (V) 40 VSENSE (mV) Maximum Current Sense Threshold vs Feedback Voltage (Current Foldback) 30 20 MINIMUIM 10 BURST COMPARATOR FALLING THESHOLD: VITH = 0.
PAGE 7
LTC3851-1 TYPICAL PERFORMANCE CHARACTERISTICS Oscillator Frequency vs Input Voltage 900 410 FREQUENCY (kHz) 700 600 RFREQ = 60k 500 400 400 395 RFREQ = 150k 385 50 25 75 0 TEMPERATURE (°C) 100 125 380 5 10 30 25 20 INPUT VOLTAGE (V) 15 35 38511 G22 Shutdown Input DC Supply Current vs Input Voltage SHUTDOWN INPUT DC SUPPLY CURRENT (μA) 35 30 25 20 15 10 5 0 5 10 15 20 25 30 INPUT VOLTAGE (V) INTVCC RAMPING UP 3 INTVCC RAMPING DOWN 2 1 0 –50 40 –25 50 25 0 75 TEMPERATURE (°C) 125
PAGE 8
LTC3851-1 PIN FUNCTIONS (MSE/UD) MODE/PLLIN (Pin 1/Pin 15): Forced Continuous Mode, Burst Mode or Pulse skipping Mode Selection Pin and External Synchronization Input to Phase Detector Pin. Connect this pin to INTVCC to force continuous conduction mode of operation. Connect to GND to enable pulse skipping mode of operation. To select Burst Mode operation, tie this pin to INTVCC through a resistor no less than 50k, but no greater than 250k.
PAGE 9
LTC3851-1 FUNCTIONAL DIAGRAM FREQ/PLLFLTR VIN MODE/PLLIN VIN + CIN 100k 5V REG 0.8V MODE/SYNC DETECT + – PLL-SYNC BOOST BURSTEN OSC CB TG S R PULSE SKIP Q M1 SW 5k + ON – ICMP IREV + – SWITCH LOGIC AND ANTISHOOT THROUGH SENSE+ DB L1 VOUT SENSE– RUN + INTVCC COUT BG OV M2 CVCC SLOPE COMPENSATION GND PGOOD INTVCC UVLO 1 100k + UV ITHB 0.72V R2 VFB – R1 + SLEEP VIN OV – – + SS + – RUN – 0.88V + 1μA EA – + + 0.8V REF 0.64V 1.25V 2μA 0.
PAGE 10
LTC3851-1 OPERATION Main Control Loop The LTC3851-1 is a constant frequency, current mode step-down controller. During normal operation, the top MOSFET is turned on when the clock sets the RS latch, and is turned off when the main current comparator, ICMP , resets the RS latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of the error ampliﬁer EA.
PAGE 11
LTC3851-1 OPERATION In sleep mode, the load current is supplied by the output capacitor. As the output voltage decreases, the EA’s output begins to rise. When the output voltage drops enough, the sleep signal goes low, and the controller resumes normal operation by turning on the top external MOSFET on the next cycle of the internal oscillator. When a controller is enabled for Burst Mode operation, the inductor current is not allowed to reverse.
PAGE 12
LTC3851-1 APPLICATIONS INFORMATION The Typical Application on the ﬁrst page of this data sheet is a basic LTC3851-1 application circuit. The LTC3851-1 can be conﬁgured to use either DCR (inductor resistance) sensing or low value resistor sensing. The choice of the two current sensing schemes is largely a design trade-off between cost, power consumption and accuracy.
PAGE 13
LTC3851-1 APPLICATIONS INFORMATION VIN INTVCC Accepting larger values of ΔIL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ΔIL = 0.3(IMAX). The maximum ΔIL occurs at the maximum input voltage.
PAGE 14
LTC3851-1 APPLICATIONS INFORMATION The peak-to-peak drive levels are set by the INTVCC voltage. This voltage is typically 5V during start-up. Consequently, logic-level threshold MOSFETs must be used in most applications. The only exception is if low input voltage is expected (VIN < 5V); then, sub-logic level threshold MOSFETs (VGS(TH) < 3V) should be used. Pay close attention to the BVDSS speciﬁcation for the MOSFETs as well; most of the logic-level MOSFETs are limited to 30V or less.
PAGE 15
LTC3851-1 APPLICATIONS INFORMATION 0V to 0.8V on the TK/SS pin. The total soft-start time can be calculated as: t SOFT-START = 0.8 • CSS 1.0μA Regardless of the mode selected by the MODE/PLLIN pin, the regulator will always start in pulse skipping mode up to TK/SS = 0.64V. Between TK/SS = 0.64V and 0.72V, it will operate in forced continuous mode and revert to the selected mode once TK/SS > 0.72V. The output ripple is minimized during the 80mV forced continuous mode window.
PAGE 16
LTC3851-1 APPLICATIONS INFORMATION VMASTER VOUT R3 VMASTER R3 TO TK/SS PIN TO VFB PIN R4 VOUT R1 TO TK/SS PIN R4 R3 TO VFB PIN R2 R4 38511 F04 (4a) Coincident Tracking Setup (4b) Ratiometric Tracking Setup Figure 4. Setup for Coincident and Ratiometric Tracking I I + D1 D2 EA TK/SS 0.8V VFB – D3 38511 F05 Figure 5. Equivalent Input Circuit of Error Ampliﬁer is used to match the shifted common mode voltage. The top two current sources are of the same amplitude.
PAGE 17
LTC3851-1 APPLICATIONS INFORMATION is low. When the topside MOSFET is to be turned on, the driver places the CB voltage across the gate source of the MOSFET. This enhances the MOSFET and turns on the topside switch. The switch node voltage, SW, rises to VIN and the BOOST pin follows. With the topside MOSFET on, the boost voltage is above the input supply: VBOOST = VIN + VINTVCC The value of the boost capacitor CB needs to be 100 times that of the total input capacitance of the topside MOSFET.
PAGE 18
LTC3851-1 APPLICATIONS INFORMATION The required ESR due to a load current step is: RESR ≤ ΔV ΔI where ΔI is the change in current from full load to zero load (or minimum load) and ΔV is the allowed voltage deviation (not including any droop due to ﬁnite capacitance). The amount of capacitance needed is determined by the maximum energy stored in the inductor. The capacitance must be sufﬁcient to absorb the change in inductor current when a high current to low current transition occurs.
PAGE 19
LTC3851-1 APPLICATIONS INFORMATION Fault Conditions: Current Limit and Current Foldback Phase-Locked Loop and Frequency Synchronization The LTC3851-1 includes current foldback to help limit load current when the output is shorted to ground. If the output falls below 40% of its nominal output level, the maximum sense voltage is progressively lowered from its maximum programmed value to about 25% of the that value. Foldback current limiting is disabled during softstart or tracking.
PAGE 20
LTC3851-1 APPLICATIONS INFORMATION The loop ﬁlter components, CLP and RLP , smooth out the current pulses from the phase detector and provide a stable input to the voltage-controlled oscillator. The ﬁlter components CLP and RLP determine how fast the loop acquires lock. Typically RLP is 1k to 10k and CLP is 2200pF to 0.01μF.
PAGE 21
LTC3851-1 APPLICATIONS INFORMATION DCR = 10mΩ and RSENSE = 5mΩ, then the total resistance is 25mΩ. This results in losses ranging from 2% to 8% as the output current increases from 3A to 15A for a 5V output, or a 3% to 12% loss for a 3.3V output. Efﬁciency varies as the inverse square of VOUT for the same external components and output power level.
PAGE 22
LTC3851-1 APPLICATIONS INFORMATION alter its delivery of current quickly enough to prevent this sudden step change in output voltage if the load switch resistance is low and it is driven quickly. If the ratio of CLOAD to COUT is greater than 1:50, the switch rise time should be controlled so that the load rise time is limited to approximately 25 • CLOAD. Thus a 10μF capacitor would require a 250μs rise time, limiting the charging current to about 200mA. the GND pin.
PAGE 23
LTC3851-1 APPLICATIONS INFORMATION HIGH CURRENT PATH 38511 F10 SENSE+ SENSE– CURRENT SENSE RESISTOR (RSENSE) Figure 10. Kelvin Sensing RSENSE The duty cycle percentage should be maintained from cycle to cycle in a well designed, low noise PCB implementation. Variation in the duty cycle at a subharmonic rate can suggest noise pick-up at the current or voltage sensing inputs or inadequate loop compensation.
PAGE 24
LTC3851-1 APPLICATIONS INFORMATION A 4.7μH inductor will produce 28% ripple current and a 3.3μH will result in 40%. The peak inductor current will be the maximum DC value plus one-half the ripple current, or 6A, for the 3.3μH value. Increasing the ripple current will also help ensure that the minimum on-time of 90ns is not violated. The minimum on-time occurs at maximum VIN: tON(MIN) = VOUT VIN(MAX ) (f) = 1.
PAGE 25
LTC3851-1 TYPICAL APPLICATIONS VIN 4.5V TO 32V MODE/PLLIN VIN + RFREQ 82.5k FREQ/PLLFLTR C20 0.1μF CSS 0.1μF RUN CB 0.1μF CIN 22μF BOOST L1 0.68μH LTC3851-1 TK/SS CC RC 2200pF 15k TG M1 HAT2170H DB CMDSH05-4 CC2 330pF ITH C15 47pF R27 3.01k INTVCC 4.7μF VFB 30.1k C5 0.047μF VOUT 3.3V 15A SW SENSE– GND SENSE+ PGOOD R1 48.
PAGE 26
LTC3851-1 TYPICAL APPLICATIONS 1.5V/15A Synchronized at 350kHz VIN 6V TO 14V C2 0.01μF R5 10k PLLIN 350kHz MODE/PLLIN VIN FREQ/PLLFLTR + TG CB 0.1μF C1 1000pF CSS 0.1μF CC RC 1000pF 7.5k RUN CIN 180μF BOOST L1 0.68μH LTC3851-1 TK/SS CC2 100pF M1 RJK0305DPB C10 33pF INTVCC M2 RJK0301DPB BG SENSE– GND SENSE+ PGOOD 1000pF RPG VPULL-UP R2 43.2k 1% R1 20k 1% 4.7μF VFB VOUT 1.5V 15A SW DB CMDSH-3 ITH RSENSE 0.
PAGE 27
LTC3851-1 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev A) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 p 0.102 (.112 p .004) 5.23 (.206) MIN 2.845 p 0.102 (.112 p .004) 0.889 p 0.127 (.035 p .005) 8 1 0.35 REF 1.651 p 0.102 (.065 p .004) 1.651 p 0.102 3.20 – 3.45 (.065 p .004) (.126 – .136) 0.305 p 0.038 (.0120 p .0015) TYP 16 0.50 (.0197) BSC 4.039 p 0.102 (.159 p .004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.
PAGE 28
LTC3851-1 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS TM LTC1625/LTC1775 No RSENSE Current Mode Synchronous Step-Down Controllers LTC1735 High Efﬁciency Synchronous Step-Down Switching Regulator Output Fault Protection, 16-Pin SSOP LTC1778 No RSENSE Wide Input Range Synchronous Step-Down Controller Up to 97% Efﬁciency, 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ (0.