LTC3862 Multi-Phase Current Mode Step-Up DC/DC Controller Features n n n n n n n n n n n n n n Description Wide VIN Range: 4V to 36V Operation 2-Phase Operation Reduces Input and Output Capacitance Fixed Frequency, Peak Current Mode Control 5V Gate Drive for Logic-Level MOSFETs Adjustable Slope Compensation Gain Adjustable Max Duty Cycle (Up to 96%) Adjustable Leading Edge Blanking ±1% Internal Voltage Reference Programmable Operating Frequency with One External Resistor (75kHz to 500kHz) Phase-Lockabl
LTC3862 Absolute Maximum Ratings (Notes 1, 2) Input Supply Voltage (VIN).......................... –0.3V to 40V INTVCC Voltage ............................................. –0.3V to 6V INTVCC LDO RMS Output Current ..........................50mA RUN Voltage................................................. –0.3V to 8V SYNC Voltage................................................ –0.3V to 6V SLOPE, PHASEMODE, DMAX, BLANK Voltage........................................... –0.
LTC3862 Electrical Characteristics (Notes 2, 3) The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN = 2V and SS = open, unless otherwise noted.
LTC3862 Electrical Characteristics (Notes 2, 3) The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN = 2V and SS = open, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX fSYNC SYNC Minimum Input Frequency VSYNC = External Clock l SYNC Maximum Input Frequency VSYNC = External Clock l VSYNC SYNC Input Threshold Rising Threshold 1.
LTC3862 Typical Performance Characteristics Efficiency and Power Loss vs Input Voltage Efficiency vs Output Current 100 95 96 VOUT = 48V 95 90 85 75 EFFICIENCY (%) VIN = 35V 80 VIN = 24V 70 65 3500 94 3000 93 VIN = 12V 60 2000 91 VOUT = 48V IOUT = 1A 55 50 2500 POWER LOSS 92 10 100 1000 LOAD CURRENT (mA) 90 10000 10 0 20 30 INPUT VOLTAGE (V) 40 3862 G01 Load Step POWER LOSS (mW) EFFICIENCY (%) 4000 EFFICIENCY 1500 3862 G02 Quiescent Current vs Input Voltage Inductor C
LTC3862 Typical Performance Characteristics INTVCC Line Regulation INTVCC Load Regulation 5.00 5.00 5.25 INTVCC vs Temperature 5.00 4.98 4.95 4.97 INTVCC VOLTAGE (V) INTVCC VOLTAGE (V) INTVCC VOLTAGE (V) 4.99 4.90 4.85 4.96 4.95 4.94 4.93 4.92 4.91 4.75 5 0 10 15 4.80 25 20 10 30 40 20 INTVCC LOAD CURRENT (mA) 0 INPUT VOLTAGE (V) INTVCC LDO Dropout vs Load Current, Temperature 85°C 800 25°C 600 –40°C 400 3.5 1.233 1.231 1.229 3.3 3.2 3.1 3.0 2.
LTC3862 Typical Performance Characteristics Maximum Current Sense Threshold vs Duty Cycle RUN Threshold vs Temperature SLOPE = 0.625 70 SLOPE = 1 SLOPE = 1.66 65 60 1.4 ON 1.25 RUN PIN VOLTAGE (V) 75 1.20 OFF 1.15 55 50 0 1.10 –50 –25 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 0 RUN PIN CURRENT (µA) –0.2 –0.3 –0.4 –0.5 –0.6 –0.7 –0.8 0 –1 –1 –2 –3 –4 –5 –6 –5.
LTC3862 Typical Performance Characteristics Oscillator Frequency vs Input Voltage RFREQ vs Frequency Frequency vs PLLFLTR Voltage 1000 320 1400 315 1200 300 295 FREQUENCY (kHz) 305 RFREQ (kΩ) FREQUENCY (kHz) 310 100 1000 290 4 12 16 20 24 28 INPUT VOLTAGE (V) 8 32 10 36 400 0 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (kHz) 1.235 1.233 400 1.231 350 MINIMUM ON-TIME (ns) 1.223 1.221 1.219 1.217 2.
LTC3862 Pin Functions (SSOP/QFN/TSSOP) 3V8 (Pin 24/Pin 22/Pin 24): Output of the Internal 3.8V LDO from INTVCC. Supply pin for the low voltage analog and digital circuits. A low ESR 1nF ceramic bypass capacitor should be connected between 3V8 and SGND, as close as possible to the IC. BLANK (Pin 3/Pin 1/Pin 3): Blanking Time. Floating this pin provides a nominal minimum on-time of 260ns.
LTC3862 Pin Functions (SSOP/QFN/TSSOP) SENSE2+ (Pin 13/Pin 11/Pin 13): Positive Inputs to the Current Comparators. The ITH pin voltage programs the current comparator offset in order to set the peak current trip threshold. This pin is normally connected to a sense resistor in the source of the power MOSFET. SENSE1– (Pin 22/Pin 20/Pin 22): Negative Inputs to the Current Comparators. This pin is normally connected to the bottom of the sense resistor.
LTC3862 FUNCTIONAL Diagram CLKOUT SYNC PLLFLTR RP VIN SYNC DETECT VIN CIN 5V LDO DMAX INTVCC CP PHASEMODE CLK1 VCO FREQ CLK2 RFREQ SLOPE BLANK SLOPE COMPENSATION BLANK LOGIC DMAX S OT R1 UV BLOGIC UV UVLO OT OVER TEMP CVCC 3.8V LDO C3V8 BIAS D GATE Q R2 SD BLOGIC M COUT LOGIC 3V8 SS PSKIP ITRIP + – ICMP 5µA CSS SENSE+ DUPLICATE FOR SECOND CHANNEL VFB PSKIP CC PSKIP + – 0.275V SD OV EA + – 1.
LTC3862 Operation The Control Loop drive supply (INTVCC) and one for the low voltage analog and digital control circuitry (3V8). A block diagram of this power supply arrangement is shown in Figure 1. The LTC3862 uses a constant frequency, peak current mode step-up architecture with its two channels operating 180 degrees out of phase.
LTC3862 Operation In multi-phase applications, all of the FB pins are connected together and all of the error amplifier output pins (ITH) are connected together. The INTVCC pins, however, should not be connected together. The INTVCC regulator is capable of sourcing current but is not capable of sinking current.
LTC3862 Operation Thermal Shutdown Protection In the event of an overtemperature condition (external or internal), an internal thermal monitor will shut down the gate drivers and reset the soft-start capacitor if the die temperature exceeds 170°C. This thermal sensor has a hysteresis of 10°C to prevent erratic behavior at hot temperatures. The LTC3862’s internal thermal sensor is intended to protect the device during momentary overtemperature conditions.
LTC3862 Operation Operation at High Supply Voltage At high input voltages, the LTC3862’s internal LDO can dissipate a significant amount of power, which could cause the maximum junction temperature to be exceeded. Conditions such as a high operating frequency, or the use of more than one power MOSFET per channel, could push the junction temperature rise to high levels.
LTC3862 Operation Operation of the RUN Pin VIN The control circuitry in the LTC3862 is turned on and off using the RUN pin. Pulling the RUN pin below 1.22V forces shutdown mode and releasing it allows a 0.5μA current source to pull this pin up, allowing a “normally on” converter to be designed. Alternatively, the RUN pin can be externally pulled up or driven directly by logic. Care must be taken not to exceed the absolute maximum rating of 8V for this pin.
LTC3862 Operation The operating frequency of the LTC3862 can be approximated using the following formula: 1000 RFREQ (kΩ) The LTC3862 uses a constant frequency architecture that can be programmed over a 75kHz to 500kHz range using a single resistor from the FREQ pin to ground. Figure 6 illustrates the relationship between the FREQ pin resistance and the operating frequency. 100 RFREQ = 5.5096E9(fOSC)–0.
LTC3862 Operation MASTER Table 1 FREQ PHASEMODE CH-1 to CH-2 PHASE CH-1 to CLKOUT PHASE APPLICATION SGND 180° 90° 2-Phase, 4-Phase Float 180° 60° 6-Phase 3V8 120° 240° 3-Phase A buffered version of the output of the error amplifier determines the threshold at the input of the current comparator. The ITH voltage that represents zero peak current is 0.4V and the voltage that represents current limit is 1.2V (at low duty cycle).
LTC3862 Operation The SS pin has an internal open-drain NMOS pull-down transistor that turns on when the RUN pin is pulled low, when the voltage on the INTVCC pin is below its undervoltage lockout threshold, or during an overtemperature condition. In multi-phase applications that use more than one LTC3862 chip, connect all of the SS pins together and use one external capacitor to program the soft-start time.
LTC3862 Operation behavior of the inductor current during the leading and trailing edges of the load current. Vary the input voltage over its full range and check for signs of cycle-by-cycle SW node instability or sub-harmonic oscillation. When the slope compensation is too low the converter can suffer from excessive jitter or, worst case, sub-harmonic oscillation. When excess slope compensation is applied to the internal current sense signal, the phase margin of the control loop suffers.
LTC3862 Operation 96% MAXIMUM DUTY CYCLE WITH DMAX = SGND MINIMUM ON-TIME AT LIGHT LOAD WITH BLANK = SGND INDUCTOR CURRENT 1A/DIV SW NODE 10V/DIV GATE 2V/DIV INDUCTOR CURRENT 2A/DIV SW NODE 20V/DIV 200ns/DIV VIN = 30V VOUT = 48V MEASURED ON-TIME = 180ns 1µs/DIV 84% MAXIMUM DUTY CYCLE WITH DMAX = FLOAT MINIMUM ON-TIME AT LIGHT LOAD WITH BLANK = FLOAT INDUCTOR CURRENT 1A/DIV SW NODE 10V/DIV GATE 2V/DIV INDUCTOR CURRENT 2A/DIV SW NODE 20V/DIV VIN = 30V 200ns/DIV VOUT = 48V MEASURED ON-TIME = 260ns
LTC3862 Operation pins. There are ESD protection diodes connected from these pins to SGND, although even at hot temperature the leakage current into the SENSE+ and SENSE– pins should be less than 1μA. Since the LTC3862 contains leading edge blanking, an external RC filter is not required for proper operation. However, if an external filter is used, the filter components should be placed close to the SENSE+ and SENSE– pins on the IC, as shown in Figure 15.
LTC3862 Operation margin. The RC • CC filter values can typically be modified slightly (from 0.5 to 2 times their suggested values) to optimize transient response once the final PC layout is done and the particular output capacitor type(s) and value(s) have been determined. The output capacitor configuration needs to be selected in advance because the effective ESR and bulk capacitance have a significant effect on the loop gain and phase.
LTC3862 Applications Information Typical Boost Applications Circuit Minimum On-Time Limitations A basic 2-phase, single output LTC3862 application circuit is shown in Figure 18. External component selection is driven by the characteristics of the load and the input supply. In a single-ended boost converter, two steady-state conditions can result in operation at the minimum on-time of the controller. The first condition is when the input voltage is close to the output voltage.
LTC3862 Applications Information Maximum Duty Cycle Limitations The peak current in each inductor is: Another operating extreme occurs at high duty cycle, when the input voltage is low and the output voltage is high. In this case: VO + VF – VIN(MIN) DMAX = VO + VF A single-ended boost converter needs a minimum off-time every cycle in order to allow energy transfer from the input inductor to the output capacitor. This minimum off-time translates to a maximum duty cycle for the converter.
LTC3862 Applications Information Reflecting this back to the input, where the current is being measured, and accounting for the ripple current, gives a minimum saturation current rating for the inductor of: IL(SAT) ≥ 1 χ 1.3 • IO(MAX ) • 1+ • n 2 1 – DMAX The saturation current rating for the inductor should be determined at the minimum input voltage (which results in the highest duty cycle and maximum input current), maximum output current and the maximum expected core temperature.
LTC3862 Applications Information Calculating Power MOSFET Switching and Conduction Losses and Junction Temperatures In order to calculate the junction temperature of the power MOSFET, the power dissipated by the device must be known. This power dissipation is a function of the duty cycle, the load current and the junction temperature itself (due to the positive temperature coefficient of its RDS(ON)). As a result, some iterative calculation is normally required to determine a reasonably accurate value.
LTC3862 Applications Information Programming the Current Limit MAXIMUM CURRENT SENSE THRESHOLD (mV) The peak sense voltage threshold for the LTC3862 is 75mV at low duty cycle and with a normalized slope gain of 1.00, and is measured from SENSE+ to SENSE–. Figure 21 illustrates the change in the sense threshold with varying duty cycle and slope gain. 80 SLOPE = 0.625 75 70 ) This equation assumes no temperature coefficient for the sense resistor.
LTC3862 Applications Information case check the diode manufacturer’s data sheet to ensure that its peak current rating exceeds the peak current in the equation above. In addition, when calculating the power dissipation in the diode, use the value of the forward voltage (VF) measured at the peak current, not the average output current.
LTC3862 Applications Information For the bulk capacitance, which we assume contributes 1% to the total output ripple, the minimum required capacitance is approximately: COUT ≥ IO(MAX ) 0.01 • n • VOUT • f For many designs it will be necessary to use one type of capacitor to obtain the required ESR, and another type to satisfy the bulk capacitance. For example, using a low ESR ceramic capacitor can minimize the ESR step, while an electrolytic capacitor can be used to supply the required bulk C.
LTC3862 Applications Information in high duty cycle applications. Figure 25 illustrates the normalized input ripple current, where: INORM = 3. The minimum on-time for this application operating in CCM is: VIN L•f 1 VO + VF – VIN(MAX ) 1 tON(MIN) = • • = f VO + VF 300kHz 1.00 0.90 48 V + 0.5V – 36 V 48 V + 0.5V = 859ns 0.80 ∆IIN/INORM 0.70 0.60 The maximum DC input current is: 1-PHASE 0.50 0.40 2-PHASE 0.30 IIN(MAX ) = 0.20 0.10 0 0 0.2 0.6 0.4 DUTY CYCLE 0.8 1.
LTC3862 Applications Information VIN 5V TO 36V 1nF GATE1 SLOPE BLANK LTC3862 ITH FB 100pF 12.4k VOUT 475k 24.9k 84.5k 1µF SS 30.1k + RUN FREQ 10nF 4.7nF 0.008Ω 100µF 1W 63V 10nF PHASEMODE SENSE1– 45.3k Q1 HAT2266H 10Ω SENSE1+ SGND 6.8µF 50V 6.8µF 50V 6.8µF 50V VIN 100µF 10µF ×4 50V 63V 4.7µF INTVCC 10Ω PGND SENSE2+ 0.008Ω 1W VOUT 48V 5A (MAX) 10µF ×4 50V 10µF ×4 50V SENSE2– CLKOUT SYNC PLLFLTR D1 30BQ060 + 3V8 DMAX L1 18.7µH PB2020-223 Q2 HAT2266H 10nF GATE2 L2 18.
LTC3862 Applications Information 10. The inductor ripple current was chosen to be 40% and the maximum load current is 5A. For a current limit set at 30% above the maximum load current, the maximum switch and sense resistor currents are: ISW(MAX ) = IR(SENSE) = = 1 χ 1.3 • IO(MAX ) • 1+ • n 2 1 – DMAX 1 0.4 1.3 • 5A • 1+ • = 7.9 A 2 2 1 – 0.505 11. The maximum current sense threshold for the LTC3862 is 75mV at low duty cycle and a normalized slope gain of 1.0.
LTC3862 Applications Information 5. Place the INTVCC decoupling capacitor as close as possible to the INTVCC and PGND pins, on the same layer as the IC. A low ESR (X5R or better) 4.7μF to 10μF ceramic capacitor should be used. SW1 50V/DIV IL1 5A/DIV 6. Use a local via to ground plane for all pads that connect to the ground. Use multiple vias for power components. SW2 50V/DIV IL2 5A/DIV VOUT 100mV/DIV AC COUPLED PC Board Layout Checklist 7.
LTC3862 Applications Information 13. If an external RC filter is used between the sense resistor and the SENSE+ and SENSE– pins, these filter components should be placed as close as possible to the SENSE+ and SENSE– pins of the IC. Ensure that the SENSE– line is connected to the ground only at the point where the current sense resistor is grounded. 14. Keep the MOSFET drain nodes (SW1, SW2) away from sensitive small-signal nodes, especially from the opposite channel’s current-sensing signals.
LTC3862 TYPICAL APPLICATIONS A 12V Input, 24V/5A Output 2-Phase Boost Converter Application Circuit VIN 5V TO 24V L1 4.2µH CDEP145-4R2 D1 MBRD835L 1nF DMAX 3V8 SLOPE BLANK 6.98k VOUT SGND CLKOUT SYNC PLLFLTR 22µF 25V + ITH FB 130k 22µF 25V 22µF 25V VIN LTC3862 100pF 100k 1µF SS 26.7k + 15k RUN FREQ 10nF 1nF 0.007Ω 100µF 1W 35V 10nF PHASEMODE SENSE1– 45.3k Q1 Si7386DP 10Ω SENSE1+ 100µF 10µF 50V 35V 4.7µF INTVCC GATE1 PGND 10µF 50V 0.
LTC3862 TYPICAL APPLICATIONS A 4.5V to 5.5V Input, 12V/15A Output 4-Phase Boost Converter Application Circuit VIN 4.5V TO 5.5V L1 2.7µH CDEP145-2R7 1nF 3V8 SENSE1 SLOPE BLANK 10nF 0.005Ω 220µF 1W 16V RUN SS LTC3862 ITH FB 330pF 33µF 10V VIN INTVCC GATE1 PGND SGND 15µF 25V SENSE2– 10nF L2 2.7µH CDEP145-2R7 SENSE2+ L1 2.7µH CDEP145-2R7 1nF DMAX 3V8 BLANK 33µF 10V 33µF 10V 1µF SS 330pF + RUN FREQ LTC3862 ITH FB SGND 33µF 10V VIN 10nF 10k 220µF 15µF 25V 16V 4.
LTC3862 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 24-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1771 Rev B) Exposed Pad Variation AA 7.70 – 7.90* (.303 – .311) 3.25 (.128) 3.25 (.128) 24 23 22 21 20 19 18 17 16 15 14 13 6.60 ±0.10 2.74 (.108) 4.50 ±0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.
LTC3862 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. GN Package 24-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641 Rev B) .337 – .344* (8.560 – 8.738) 24 23 22 21 20 19 18 17 16 15 1413 .045 ±.005 .229 – .244 (5.817 – 6.198) .254 MIN .033 (0.838) REF .150 – .157** (3.810 – 3.988) .150 – .165 1 .0165 ±.0015 2 3 4 5 6 7 8 9 10 11 12 .0250 BSC RECOMMENDED SOLDER PAD LAYOUT .015 ±.004 × 45° (0.38 ±0.
LTC3862 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UH Package 24-Lead Plastic QFN (5mm × 5mm) (Reference LTC DWG # 05-08-1747 Rev A) 0.75 ±0.05 5.40 ±0.05 3.90 ±0.05 3.20 ± 0.05 3.25 REF 3.20 ± 0.05 PACKAGE OUTLINE 0.30 ± 0.05 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ± 0.10 R = 0.05 TYP 0.75 ± 0.05 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD R = 0.150 TYP 23 PIN 1 NOTCH R = 0.
LTC3862 Revision History (Revision history begins at Rev C) REV DATE DESCRIPTION C 12/13 Added Comparison table PAGE NUMBER 1 Added Note 9 4 Added pin number registers 9 3862fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection its circuits as described herein will not infringe on existing patent rights.
LTC3862 Typical Application A 12V Input, 24V/5A Output 2-Phase Boost Converter Application Circuit VIN 5V TO 24V L1 4.2µH CDEP145-4R2 1nF 3V8 SLOPE BLANK ITH FB 6.98k VOUT 130k 22µF 25V SGND CLKOUT SYNC PLLFLTR 22µF 25V 22µF 25V VIN LTC3862 100pF 100k 1µF SS 26.7k 15k + RUN FREQ 10nF 1nF 0.007Ω 100µF 1W 35V 10nF PHASEMODE SENSE1– 45.3k Q1 Si7386DP 10Ω SENSE1+ + DMAX D1 MBRD835L 100µF 10µF 50V 35V 4.7µF INTVCC GATE1 PGND 10Ω 0.
