Datasheet

LTC3869/LTC3869-2
23
38692fa
For more information www.linear.com/LTC3869
applicaTions inForMaTion
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3869, ceramic capacitors
can also be used for C
IN
. Always consult the manufacturer
if there is any question.
The benefit of the LTC3869 2-phase operation can be
calculated by using the equation above for the higher
power controller and then calculating the loss that would
have resulted if both controller channels switched on at
the same time. The total RMS power lost is lower when
both controllers are operating due to the reduced overlap
of current pulses required through the input capacitor’s
ESR. This is why the input capacitor’s requirement cal-
culated above for the worst-case controller is adequate
for the dual controller design. Also, the input protection
fuse resistance, battery resistance, and PC board trace
resistance losses are also reduced due to the reduced
peak currents in a 2-phase system. The overall benefit of
a multiphase design will only be fully realized when the
source impedance of the power
supply/battery is included
in
the efficiency testing. The sources of the top MOSFETs
should be placed within 1cm of each other and share a
common C
IN
(s). Separating the sources and C
IN
may pro-
duce undesirable voltage and current resonances at V
IN
.
A small (0.1µF to 1µF) bypass capacitor between the chip
V
IN
pin and ground, placed close to the LTC3869, is also
suggested. A 2.2Ω to 10Ω resistor placed between C
IN
(C1) and the V
IN
pin provides further isolation between
the two channels.
The selection of C
OUT
is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (∆V
OUT
) is approximated by:
∆V
OUT
≈ I
RIPPLE
ESR+
1
8fC
OUT
⎛
⎝
⎜
⎞
⎠
⎟
where f is the operating frequency, C
OUT
is the output
capacitance and I
RIPPLE
is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I
RIPPLE
increases with input voltage.
Setting Output Voltage
The LTC3869 output voltages are each set by an external
feedback resistive divider carefully placed across the out-
put, as shown in Figure 8. The regulated output voltage
is determined by:
V
OUT
= 0.6V • 1+
R
B
R
A
⎛
⎝
⎜
⎞
⎠
⎟
To improve the frequency response, a feed-forward ca-
pacitor, C
FF
, may be used. Great care should be taken to
route the V
FB
line away from noise sources, such as the
inductor or the SW line.
Figure 8. Setting Output Voltage
Fault Conditions: Current Limit and Current Foldback
The LTC3869 includes current foldback to help limit load
current when the output is shorted to ground. If the out-
put falls below 50% of its nominal output level, then the
maximum sense voltage is progressively lowered from its
maximum programmed value to one-third of the maximum
value. Foldback current limiting is disabled during the
soft-start or tracking up. Under short-circuit conditions
with very low duty cycles, the LTC3869 will begin cycle
skipping in order to limit the short-circuit current. In this
situation the bottom MOSFET will be dissipating most of
the power but less than in normal operation. The short-
circuit ripple current is determined by the minimum on-
time t
ON(MIN)
of the LTC3869 (≈ 90ns), the input voltage
and inductor value:
∆I
L(SC)
= t
ON(MIN)
•
V
IN
L
The resulting short-circuit current is:
I
SC
=
1/3 V
SENSE(MAX)
R
SENSE
–
1
2
∆I
L(SC)
1/2 LTC3869
V
FB
V
OUT
R
B
C
FF
R
A
3869 F08