Datasheet

LTC3869/LTC3869-2
9
38692fa
For more information www.linear.com/LTC3869
pin FuncTions
(UFD/GN)
FREQ (Pin 26/Pin 28): There is a precision 10µA current
flowing out of this pin. Connect a resistor to ground set
the controllers’ operating frequency. Alternatively, this pin
can be driven with a DC voltage to vary the frequency of
the internal oscillator.
I
LIM
(Pin 11/NA): Current Comparator Sense Voltage Range
Inputs. This pin is to be programmed to SGND, FLOAT or
INTV
CC
to set the maximum current sense threshold to
three different levels for each comparator. The current
limit default value is set to be 50mV for LTC3869GN-2.
EXTV
CC
(Pin 12/Pin 14): External Power Input to an Inter-
nal Switch Connected to INTV
CC
. This switch closes and
supplies the IC power, bypassing the internal low dropout
regulator, whenever EXTV
CC
is higher than 4.7V. Do not
exceed 6V on this pin.
V
IN
(Pin 20/Pin 22): Main Input Supply. Decouple this pin
to PGND with a capacitor (0.1µF to 1µF).
BOOST1, BOOST2 (Pin 22, Pin 16/Pin 24, Pin 18): Boosted
Floating Driver Supplies. The (+) terminal of the booststrap
capacitors connect to these pins. These pins swing from
a diode voltage drop below INTV
CC
up to V
IN
+ INTV
CC
.
TG1, TG2 (Pin 23, Pin 15/Pin 25, Pin 17): Top Gate
Driver
Outputs. These are the outputs of floating drivers
with
a voltage swing equal to INTV
CC
superimposed on
the switch nodes voltages.
SW1, SW2 (Pin 24, Pin 14/Pin 26, Pin 16): Switch Node
Connections to Inductors. Voltage swing at these pins
is from a Schottky diode (external) voltage drop below
ground to V
IN
.
SENSE1
+
, SENSE2
+
(Pin 28, Pin 9/Pin 2, Pin 12): Current
Sense Comparator Inputs. The (+) inputs to the current
comparators are normally connected to DCR sensing
networks or current sensing resistors.
SENSE1
–
, SENSE2
–
(Pin 1, Pin 8/Pin 3, Pin 11): Current
Sense Comparator Inputs. The (–) inputs to the current
comparators are connected to the outputs.
PGND (Pin 17/Pin 19): Power Ground Pin. Connect this
pin closely to the sources of the bottom N-channel MOS-
FETs, the (–) terminal of CV
CC
and the (–) terminal of C
IN
.
BG1, BG2 (Pin 21, Pin 18/Pin 23, Pin 20): Bottom Gate
Driver Outputs. These pins drive the gates of the bottom
N-channel MOSFETs between PGND and INTV
CC
.
INTV
CC
(Pin 19/Pin 21): Internal 5V Regulator Output. The
control circuits are powered from this voltage. Decouple
this pin to PGND with a minimum of 4.7µF low ESR tan-
talum or ceramic capacitor.
PGOOD (Pin 13/Pin 15): Power Good Indicator Output.
Open
drain logic out that is pulled to ground when either
channel
output exceeds ±10% regulation windows, after
the internal 20µs power bad mask timer expires.