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LTC3901

3901f

■

N-Channel Synchronous MOSFET Driver

■

Programmable Timeout

■

Reverse Inductor Current Sense

■

Gate Drive Transformer Synchronization

Sequence Monitor

■

Wide V

Supply Range: 4.5V to 11V

■

15ns Rise/Fall Times at V

= 5V, C

= 4700pF

■

Undervoltage Lockout

■

Small 16-Lead SSOP Package

Secondary Side

Synchronous Driver for Push-Pull

and Full-Bridge Converters

The LTC

3901 is a secondary side synchronous rectifier

driver designed to be used in isolated push-pull and full-

bridge converter power supplies. The chip drives two

external N-channel MOSFETs and accepts a transformer-

generated bipolar input to maintain sychronization with

the primary side controller.

The LTC3901 provides a full range of protection features

for the external MOSFETs. A programmable timeout func-

tion is included that disables both drivers when the syn-

chronization signal is missing or incorrect. Additionally,

the chip senses the output inductor current through the

drain-source resistance of the two MOSFETs, turning off

the MOSFETs if the inductor current reverses. The LTC3901

also shuts off the drivers if the supply is low or if the

synchronization sequence is incorrect.

Figure 1. Simplified Isolated Push-Pull Converter

LTC3723

PUSH-PULL

CONTROLLER

LT4430 OR LT1431

OPTOCOUPLER

DRIVER

DRVA DRVB

COMP V

SDRBSDRA

ISOLATION

BARRIER

CSE

–

CSF

–

GND

PGND

LTC3901

OUT

MA MB ME

COMP

OUT

12V

OUT

36V TO 72V

3901 F01

SYNC

TIMER

■

48V Input Isolated DC/DC Converters

■

Isolated Telecom Power Supplies

■

Distributed Power Step-Down Converters

■

Industrial Control System Power Supplies

■

Automotive and Heavy Equipment

DESCRIPTIO

FEATURES

APPLICATIO S

TYPICAL APPLICATIO

, LTC and LT are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Summary of content (16 pages)

PAGE 1
LTC3901 Secondary Side Synchronous Driver for Push-Pull and Full-Bridge Converters U FEATURES DESCRIPTIO ■ The LTC®3901 is a secondary side synchronous rectifier driver designed to be used in isolated push-pull and fullbridge converter power supplies. The chip drives two external N-channel MOSFETs and accepts a transformergenerated bipolar input to maintain sychronization with the primary side controller.
PAGE 2
LTC3901 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) ORDER PART NUMBER TOP VIEW Supply Voltage VCC, PVCC ............................................................................ 12V Input Voltage CSE–, CSF–, TIMER ................. –0.3V to (VCC + 0.3V) SYNC ...................................................... –12V to 12V Input Current CSE+, CSF+ ..................................................................... 15mA Operating Temperature Range (Note 2) ...
PAGE 3
LTC3901 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range. VCC = 5V, TA = 25°C unless otherwise specified.
PAGE 4
LTC3901 U W TYPICAL PERFOR A CE CHARACTERISTICS SYNC Negative Threshold vs Temperature 120 120 TA = 25°C CLOAD = 4.7nF –1.1 110 PROPAGATION DELAY (µs) –1.2 –1.3 –1.4 –1.5 –1.6 100 90 80 70 60 SYNC TO ME 50 –1.7 110 40 –1.
PAGE 5
LTC3901 U W TYPICAL PERFOR A CE CHARACTERISTICS VCC Supply Current vs Load Capacitance VCC Supply Current vs Temperature 20 30 CLOAD = 4.7nF TA = 25°C 25 16 VCC = 11V SUPPLY CURRENT (mA) VCC SUPPLY CURRENT (mA) 18 14 12 10 8 VCC = 5V VCC = 11V 20 15 10 VCC = 5V 5 6 4 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 3901 G15 0 0 1 2 3 4 5 6 CLOAD (nF) 7 8 9 10 3901 G16 U U U PI FU CTIO S PVCC (Pin 1): Driver Supply Input. This pin powers the ME and MF drivers.
PAGE 6
LTC3901 W BLOCK DIAGRA SYNC 9 SYNC+ S+ 16 VCC +1.4V –1.4V CSE+ 6 –+ 5 SYNC AND DRIVER LOGIC ISE 10.5mV CSE– SYNC – S– DISABLE DRIVER ZCSE 11V CSF+ 11 10.5mV CSF– 12 PVCC 3 ME 4 PGND 14 MF 13 PGND UVLO ISF –+ TIMER RESET 1 ZCSF 11V TMR TIMER 7 R1 180k ZTMR 0.5 • VCC R2 45k MTMR 8 10 3901 BD GND GND U W U U APPLICATIO S I FOR ATIO Overview Push-pull and full bridge converters use power transformers to provide input-to-output isolation and voltage stepup/down.
PAGE 7
LTC3901 U W U U APPLICATIO S I FOR ATIO In the first period, SDRA goes low (followed by DRVA going high) and T2 generates a positive voltage at the LTC3901’s SYNC input. The LTC3901’s ME output then pulls low. Current flows to the load through MOSFET MF, T1’s secondary and L1. In the second period, SDRA goes high and T2 provides approximately 0V at the LTC3901 SYNC input. This causes the LTC3901’s ME output to go high and both MOSFET ME and MF to conduct.
PAGE 8
LTC3901 U W U U APPLICATIO S I FOR ATIO The timeout period is determined predominantly by the external RTMR and CTMR values and is independent of the VCC voltage. This independence is achieved by making the timeout threshold a ratio of VCC. The ratio is 0.2x, set internally by R1 and R2 (see Figure 3). The Timeout period should be programmed to around 1 period of the primary switching frequency using the following formula: TIMEOUT = 0.2 • RTMR • CTMR + 0.
PAGE 9
LTC3901 U W U U APPLICATIO S I FOR ATIO output goes high; this is to avoid any ringing immediately after the MOSFETs are switched on. Under no/light load conditions, if the inductor average current is less than half of its peak-to-peak ripple current, the inductor current will reverse into MOSFETs during a portion of the free-wheeling period, forcing CSX+ to rise above CSX–. The current sense comparator input threshold is set at 10.5mV to prevent tripping under this normal no load condition.
PAGE 10
LTC3901 U U W U APPLICATIO S I FOR ATIO the resistors to the LTC3901 CSX+/CSX– pins as short as possible . Add a series resistor, RCSX3, with value equal to parallel sum of RCSX1 and RCSX2 to the CSX– pin and connect the other end of RCSX3 directly to the source of the MOSFET. SYNC Input Figure 8 shows the external circuit for the LTC3901 SYNC input. The gate drive transformer (T2) should be selected based on the primary switching frequency and SDRA/ SDRB output voltage.
PAGE 11
LTC3901 U W U U APPLICATIO S I FOR ATIO VIN ISOLATION BARRIER MC MA T3 L1 T4 VOUT + T1 L2 COUT MB MD 6 3 ME CSE + B C D LTC3722-1 FULL-BRIDGE CONTROLLER COMP VFB E MF 16 ME 5 CSE – 11 CSF + GND 8,10 LTC3901 the A VCC 14 12 F 9 PVCC 1 MF CSF – PGND SYNC TIMER 4,13 7 T2 OUT FB OPTOCOUPLER DRIVER COMP 3901 F10 Figure 10.
PAGE 12
LTC3901 U W U U APPLICATIO S I FOR ATIO MOSFET Selection PC Board Layout Checklist The required MOSFET RDS(ON) should be determined based on allowable power dissipation and maximum required output current. When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3901: The MOSFETs body diodes conduct during the power-up phase, when the LTC3901 VCC supply is ramping up.
PAGE 13
1µF 220pF 66.5k 15 5 100pF 383k 30k 8 10k 16 33k 12 7 13 4 DRVB 14 2 11 0.47µF 5V 1 820Ω COMP VREF SDRB 3 SDRA 150k 68nF 9 SS DPRG LTC3723EGN-1 CS 10 470Ω UVLO CT SPRG RLEB GND FB VCC 6 DRVA 330pF 75k 6 5 C7 2.2nF 250V 8 D5 D4 6 5 8 • 5 0.1µF 47nF • T2 1(1.5mH):0.5 1 4 100k 2 1 1k 0.1µF C5 68µF 20V L4 1mH MOC207 22Ω + 10V 4 1 9 10 7 8 11 12 V+ 3 8.5V SYNC 360Ω 6 5 GND-F GND-S 8 12 14 MF 15 LTC3901EGN MF CSE+ 4.
PAGE 14
30.1k 12V MMBZ5242B 1µF 1 11V 6 DRVA A 4 LTC3723EGN-2 Si7852DP ×2 Si7852DP ×2 1 0.47µF 150pF 9 8 10k 16 7 SDRA COMP 470pF 1k 10 14 13 FB 68µF 3 6 1 5 3 4 2 2N7002 4.7k 8 CS 7.5Ω D4 + 5 L2 0.22µH 7.5Ω D5 220pF 100Ω 9 12 14 15 6 CSE+ 5 3k 4 10 13 GND PGND GND PGND 8 2 + 3 –VOUT 16 C2 180µF 16V VOUT 330pF 7 TIMER PVCC CSE– ME ME VCC 10k 4.
PAGE 15
VIN 93 6 8 3 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 66.5k 1.5nF 4 1µF 15 5 13 7 8 FB GND CT UVLO 10k 270pF 33k 16 12 14 68nF 0.47µF 1 VREF 9 150k SPRG RLEB SS DPRG SDRB VCC DRVB ISNS DRVA LTC3723EGN-1 R2 0.03Ω 1.
PAGE 16
LTC3901 U PACKAGE DESCRIPTIO GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 .0532 – .0688 (1.35 – 1.75) 7 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.