Datasheet

LTC4020
25
4020fd
For more information www.linear.com/LTC4020
To maximize effectiveness of the diodes, the inductance
between the switches and the synchronous switches must
be minimized, so the diodes should be placed adjacent to
their corresponding FET switch.
The Dd diode also reduces power dissipation in the D switch
during periods of reverse current inhibit operation, during
which time the D switch is disabled. Load currents are low
during reverse inhibit, and diode Db only conducts during
switch dead times, so both can have current ratings well
below the DC/DC converter inductor current maximum.
Typically, a diode with an average current rating at or above
one-tenth of I
LMAX
is adequate, provided the diode has an
instantaneous current rating that exceeds the maximum
inductor current, or I
LMAX
+ ½ ΔI
MAX
.
Db reverse voltage rating must exceed V
IN
. Dd reverse
voltage rating must exceed V
OUT
.
INTV
CC
LDO Output, and BST1 and BST2 Supplies
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTV
CC
pin. An
internal 5V low dropout regulator (LDO) supplies INTV
CC
power from the PV
IN
pin. INTV
CC
is decoupled to PGND
using a 2.2µF ceramic capacitor.
The BST1 and BST2 bootstrapped supply pins power
internal high side FET gate drivers, which output to pins
TG1 and TG2. BST1 provides switch gate drive above the
input power supply voltage for switch FET A, and BST2
provides switch gate drive above the output power supply
voltage for switch FET D, as designated in Figure 1. These
boosted supply pins allows the use of NFET switches for
increased conversion efficiency. These bootstrapped sup-
plies are regenerated through external Schottky diodes
from the INTV
CC
pin.
Connect two low leakage 1A Schottky diode anodes to the
INTV
CC
pin. Connect one Schottky cathode to the BST1
pin. This diode must be rated for reverse voltage standoff
exceeding the maximum input supply voltage. Connect the
other diode cathode to the BST2 pin. This diode must be
rated for reverse voltage standoff exceeding the converter
safety limit output, V
OUT(MAX)
.
Connect a ceramic capacitor from the BST1 pin to the
SW1 pin and another from BST2 pin to the SW2 pin.
The value of these two capacitors should be at least 50
times greater than the equivalent total gate capacitance
of the corresponding switch FET. Total FET gate charge
(Q
G(TOT)
) is typically specified at a specific gate-source
voltage (V
GS(Q)
). Using those parameters, the required
boost capacitor values (C
BST
) follow the relation:
C
BST
> 50 • Q
G(TOT)
/V
GS(Q)
C
BST
= 1µF is typically adequate for most applications.
During low load operation, start-up, and nonoverlap
periods, inductor current is conducted by the silicon
body diode of the synchronous FET. This diode stores a
significant amount of charge, so when the primary switch
turns on for the next switch cycle, reverse recovery current
is conducted by the main switch to discharge this diode.
The resultant short-duration current spike can be orders of
magnitude greater than the inductor current itself, resulting
in an extremely fast dV/dt on the switched node. Conse
-
quently, parasitic inductance associated with the switch
FET packaging and/
or less-than-ideal layout can induce a
voltage spike of 10 or more volts at the leading edge of a
switching cycle. This can be particularly problematic on
the step-up side of the inductor, as these voltage spikes
are negative, and can cause a build-up of voltage on the
BST2-SW2 capacitor. This would generally occur when
the step-up synchronous switch (D) is disabled, such as
during low load operation and during start-up. If voltage
build-up on the boosted supply proves excessive, it could
potentially violate absolute maximum voltage ratings of the
IC and cause damage. This effect can be greatly reduced
by implementing a Schottky diode across the step-up
synchronous FET, shown as D
D
in Figure 1, which reduces
reverse recovery charge in the synchronous FET body
diode. A low current 6V Zener (0.1A) in parallel with the
BST2-SW2 capacitor will also effectively shunt any errant
charge and prevent excessive voltage build-up.
External Power for BST1 and BST2 Supplies
Power for the top and bottom MOSFET drivers can be
supplied by an external supply, provided that a precision
5V supply is available (±5%).
The INTV
CC
internal supply is a linear regulator, which
transfers current from the V
IN
pin. As such, power dis-
sipation can be excessive with high V
IN
pin voltages and/
applicaTions inForMaTion
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