Datasheet

LTC4227
9
422712fa
For more information www.linear.com/LTC4227
operaTion
The LTC4227 functions as an input supply diode-OR with
inrush current limiting and overcurrent protection by
controlling the external N-channel MOSFETs (M
D1
, M
D2
and M
H
) on a supply path. This allows boards to be safely
inserted and removed in systems with a backplane powered
by redundant supplies. The LTC4227 has a single Hot Swap
controller and two separate ideal diode controllers, each
providing independent control for the two input supplies.
When the LTC4227 is first powered up, the gates of the
MOSFETs are all held low, keeping them off. As the DGATE2
pull-up can be disabled by the D2ON pin, DGATE2 will pull
high only when the D2ON pin is pulled low. The gate drive
amplifier (GA1, GA2) monitors the voltage between the
IN and SENSE
+
pins and drives the respective DGATE pin.
The amplifier quickly pulls up the DGATE pin, turning on
the MOSFET for ideal diode control, when it senses a large
forward voltage drop. With the ideal diode MOSFETs acting
as an input supply diode-OR, the SENSE
+
pin voltage rises
to the highest of the supplies at the IN1 and IN2 pins. The
stored charge
in an external capacitor connected between
the CPO and IN pins provides the charge needed to quickly
turn on the ideal diode MOSFET. An internal charge pump
charges up this capacitor at device power-up. The DGATE
pin sources current from the CPO pin and sinks current
into the IN and GND pins.
Pulling the ON pin high and EN pin low initiates a debounce
timing cycle (100ms for LTC4227-1/LTC4227-2 and 1.6ms
for LTC4227-3/LTC4227-4). After this timing cycle, a 10µA
current source from the charge pump ramps up the HGATE
pin. When the Hot Swap MOSFET turns on, the inrush cur-
rent is limited at a level set by an external sense resistor
(R
S
) connected between the SENSE
+
and SENSE
–
pins.
An active current limit amplifier (A1) servos the gate of
the MOSFET to 65mV across the current sense resistor.
Inrush current can be further reduced, if desired, by add
-
ing a capacitor from HGATE to GND. When the MOSFET ’s
gate overdrive (HGATE to OUT voltage) exceeds 4.2V, the
PWRGD pin pulls low.
When the ideal diode MOSFET is turned on, the gate drive
amplifier controls DGATE to servo the forward voltage drop
(V
IN
– V
SENSE
+
) across the MOSFET to 25mV . If the load
current causes more than 25mV of voltage drop, the gate
voltage rises to enhance the MOSFET. For large output
currents, the MOSFET ’s gate is driven fully on and the
voltage drop is equal to I
LOAD
• R
DS(ON)
of the MOSFET.
In the case of an input supply short-circuit when the
MOSFETs are conducting, a large reverse current starts
flowing from the load towards the input. The gate drive
amplifier detects this failure condition as soon as it ap
-
pears and turns off the ideal diode MOSFET by pulling
down the DGATE pin.
In the case where an overcurrent fault occurs on the supply
output, the current is limited to 65mV/R
S
. After a fault filter
delay set by 100µA charging the TMR pin capacitor, the
circuit breaker trips and pulls the HGATE pin low, turning
off the Hot Swap MOSFET. The FAULT pin is latched low.
At this point, the DGATE pin continues to pull high and
keeps the ideal diode MOSFET on.
Internal clamps limit both the DGATE to IN and CPO to IN
voltages to 12V. The same clamp also limits the
CPO and
DGATE pins to a diode voltage below the IN pin. Another
internal clamp limits the HGATE to OUT voltage to 12V
and also clamps the HGATE pin to a diode voltage below
the OUT pin.
Power to the LTC4227 is supplied from either the IN or
OUT pins, through an internal diode-OR circuit to a low
dropout regulator (LDO). That LDO generates a 5V supply
at the INTV
CC
pin and powers the LTC4227’s internal low
voltage circuitry.