Datasheet

LTC4274A/LTC4274C
25
4274acfc
APPLICATIONS INFORMATION
V
EE
is the main supply that provides power to the PD.
Because it supplies a relatively large amount of power and
is subject to significant current transients, it requires more
design care than a simple logic supply. For minimum IR
loss and best system efficiency, set V
EE
near maximum
amplitude (57V), leaving enough margin to account for
transient over- or undershoot, temperature drift, and the
line regulation specs of the particular power supply used.
Bypass capacitance between AGND and V
EE
is very impor-
tant for reliable operation. If a short-circuit occurs at the
output port it can take as long as 1s for the LTC4274A/
LTC4274C to begin regulating the current. During this
time the current is limited only by the small impedances
in the circuit and a high current spike typically occurs,
causing a voltage transient on the V
EE
supply and possibly
causing the LTC4274A/LTC4274C to reset due to a UVLO
fault. A 1F, 100V X7R capacitor placed near the V
EE
pin
is recommended to minimize spurious resets.
Isolating the Serial Bus
The LTC4274A/LTC4274C includes a split SDA pin (SDAIN
and SDAOUT) to ease opto-isolation of the bidirectional
SDA line.
IEEE 802.3 Ethernet specifications require that network
segments (including PoE circuitry) be electrically isolated
from the chassis ground of each network interface device.
However, network segments are not required to be isolated
from each other, provided that the segments are connected
to devices residing within a single building on a single
power distribution system.
For simple devices such as small PoE switches, the isola-
tion requirement can be met by using an isolated main
power supply for the entire device. This strategy can be
used if the device has no electrically conducting ports
other than twisted-pair Ethernet. In this case, the SDAIN
and SDAOUT pins can be tied together and will act as a
standard I
2
C/SMBus SDA pin.
If the device is part of a larger system, contains additional
external non-Ethernet ports, or must be referenced to
protective ground for some other reason, the Power over
Ethernet subsystem (including all LTC4274A/LTC4274Cs)
must be electrically isolated from the rest of the system.
Figure 16 shows a typical isolated serial interface. The
SDAOUT pin of the LTC4274A/LTC4274C is designed to
drive the inputs of an opto-coupler directly. Standard I
2
C/
SMBus devices typically cannot drive opto-couplers, so U1
is used to buffer the signals from the host controller side.
Figure 15. Positive V
DD
Boost Converter
4274AC F15
R54
56k
C79
2200pF
GND
ITH/RUN
LTC3803
V
CC
2
5
V
FB
1
3
NGATE
Q15
FDC2512
Q13
FMMT723
Q14
FMMT723
SENSE
6
4
V
EE
C74
100µF
6.3V
C75
10µF
16V
L3
100µH
SUMIDA CDRH5D28-101NC
R51
4.7k
1%
R53
4.7k
1%
R52
3.32k
1%
3.3V AT 400mA
R55
806
1%
R59
0.100
1%, 1W
R56
47.5k
1%
R57
1k
D28
B1100
R58
10
R60
10
C73
10µF
6.3V
L4
10µH
SUMIDA CDRH4D28-100NC
+
C77
0.22µF
100V
C78
0.22µF
100V
C76
10µF
63V