Datasheet

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LTC4301

4301fb

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

Supply Independent Hot

Swappable 2-Wire Bus Buffer

■

Allows Bus Pull-Up Voltages Above or Below V

■

Bidirectional Buffer* for SDA and SCL Lines

Increases Fanout

■

Prevents SDA and SCL Corruption During Live Board

Insertion and Removal from Backplane

■

Isolates Input SDA and SCL Line from Output

■

10kV Human Body Model ESD Protection

■

1V Precharge On All SDA and SCL Lines

■

Supports Clock Stretching, Arbitration and

Synchronization

■

High Impedance SDA, SCL Pins for V

= 0V

■

CS Gates Connection from Input to Output

■

Compatible with I

, I

C Fast Mode and SMBus

Standards (Up to 400kHz Operation)

■

Small 8-Pin MSOP and DFN (3mm × 3mm) Packages

■

Hot Board Insertion

■

Servers

■

Capacitance Buffer/Bus Extender

■

Desktop Computers

■

CompactPCI

and ATCA Systems

The LTC

4301 supply independent, hot swappable, 2-wire

bus buffer allows I/O card insertion into a live backplane

without corruption of the data and clock busses. In addi-

tion, the LTC4301 allows the V

, SDAIN and SCLIN pull-

up voltage and the SDAOUT and SCLOUT pull-up voltage

to be independent from each other. Control circuitry

prevents the backplane from being connected to the card

until a stop bit or a bus idle is present. When the connec-

tion is made, the LTC4301 provides bidirectional buffer-

ing, keeping the backplane and card capacitances isolated.

During insertion, the SDA and SCL lines are precharged to

1V to minimize bus disturbances. When driven low, the CS

input pin allows the part to connect after a stop bit or bus

idle occurs. Driving CS high breaks the connection be-

tween SCLIN and SCLOUT and between SDAIN and

SDAOUT. The READY output pin indicates that the back-

plane and card sides are connected together.

The LTC4301 is offered in 8-pin DFN (3mm × 3mm) and

MSOP packages.

10k10k

BACK_SCL

BACKPLANE

CONNECTOR

CARD

BACK_SDA

3.3V

10k

CARD_SCL

CARD_SDA

SCLOUTSCLIN

SDAOUTSDAIN

GND

LTC4301

READY

0.01µF

4301 TA01

10k 10k

STAGGERED CONNECTOR



Input-Output Connection

4301 TA01b

OUTPUT

SIDE

20pF

INPUT

SIDE

55pF

1µs/DIV

1V/DIV

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 7032051.

Summary of content (12 pages)

PAGE 1
LTC4301 Supply Independent Hot Swappable 2-Wire Bus Buffer U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®4301 supply independent, hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. In addition, the LTC4301 allows the VCC, SDAIN and SCLIN pullup voltage and the SDAOUT and SCLOUT pull-up voltage to be independent from each other.
PAGE 2
LTC4301 W W U W ABSOLUTE MAXIMUM RATINGS (Note 1) VCC to GND ................................................. –0.3V to 7V SDAIN, SCLIN, SDAOUT, SCLOUT, CS ........ –0.3V to 7V READY ........................................................ –0.3V to 6V Operating Temperature Range LTC4301C ............................................... 0°C to 70°C LTC4301I ............................................ – 40°C to 85°C Storage Temperature Range MSOP ...............................................
PAGE 3
LTC4301 ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 0 100 175 mV Input-Output Connection ● VOS Input-Output Offset Voltage 10k to VCC on SDA, SCL, VCC = 3.3V, SDA or SCL = 0.
PAGE 4
LTC4301 U U U PI FU CTIO S CS (Pin 1): The connection sense pin is a 1.4V threshold digital input pin. For normal operation CS is grounded. Driving CS above the 1.4V threshold isolates SDAIN from SDAOUT and SCLIN from SCLOUT and asserts READY low. SCLOUT (Pin 2): Serial Clock Output. Connect this pin to the SCL bus on the card. SCLIN (Pin 3): Serial Clock Input. Connect this pin to SCL on the bus backplane. GND (Pin 4): Ground. Connect this pin to a ground plane for best results.
PAGE 5
LTC4301 U OPERATIO Start-Up When the LTC4301 first receives power on its VCC pin, either during power-up or live insertion, it starts in an undervoltage lockout (UVLO) state, ignoring any activity on the SDA or SCL pins until VCC rises above 2.5V (typical). This is to ensure that the part does not try to function until it has enough voltage to do so. During this time, the 1V precharge circuitry is active and forces 1V through 200k nominal resistors to the SDA and SCL pins.
PAGE 6
LTC4301 U OPERATIO There is a finite high to low propagation delay through the connection circuitry for falling waveforms. Figure 2 shows the falling edge waveforms for the same pull-up resistors and equivalent capacitance conditions as used in Figure 1. An external N-channel MOSFET device pulls down the voltage on the side with 55pF capacitance; LTC4301 pulls down the voltage on the opposite side with a delay of 60ns.
PAGE 7
LTC4301 U W U U APPLICATIO S I FOR ATIO Live Insertion and Capacitance Buffering Application Figures 3 illustrates applications of the LTC4301 with different bus pull-up and VCC voltages, demonstrating its ability to recognize and buffer bus data levels that are above or below its VCC supply. All of these applications take advantage of the LTC4301’s Hot SwapTM controlling, capacitance buffering and precharge features.
PAGE 8
LTC4301 U W U U APPLICATIO S I FOR ATIO they make contact. CS is a short pin that is pulled up when not connected. This is to ensure that the connection between the backplane and the cards data and clock busses is not enabled until the transients associated with live insertion have settled. Figure 4 shows the LTC4301 in a CompactPCITM configuration. The LTC4301 receives its VCC voltage from one of the long “early power” pins.
PAGE 9
LTC4301 U W U U APPLICATIO S I FOR ATIO BACKPLANE BACKPLANE CONNECTOR I/O PERIPHERAL CARD 1 VCC 0.01µF 0.1µF VCC2 R1 10k R2 10k R3 100k CS SDA SDAIN SCL SCLIN R4 10k R5 10k R6 10k VCC SDAOUT CARD_SDA LTC4301 SCLOUT CARD_SCL GND READY I/O PERIPHERAL CARD 2 0.01µF 0.1µF R7 100k CS SDAIN SCLIN R8 10k R9 10k R10 10k VCC SDAOUT CARD2_SDA LTC4301 SCLOUT CARD2_SCL GND READY • • • 4301 F05 Figure 5.
PAGE 10
LTC4301 U W U U APPLICATIO S I FOR ATIO VCC3 VCC1 VCC4 VCC2 VCC5 0.01µF R1 10k R4 10k 0.01µF R5 10k LTC4301 R3 R2 5.1k 5.1k R6 10k R7 10k LTC4301 VCC R8 10k VCC CS SDAOUT SDAOUT CS SDA1 SDAIN SCLOUT SCLOUT SDAIN SDA2 SCL1 TO OTHER SYSTEM 1 DEVICES SCLIN READY READY SCLIN SCL2 TO OTHER SYSTEM 2 DEVICES GND GND LONG DISTANCE BUS 4301 F07 Figure 6. Repeater/Bus Extender Application VCC RDROP VCC (BUS) R1 10k 0.
PAGE 11
LTC4301 U PACKAGE DESCRIPTIO DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 ± 0.10 8 0.675 ±0.05 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) 3.00 ±0.10 (4 SIDES) 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 1203 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) PACKAGE OUTLINE 4 0.25 ± 0.05 0.75 ±0.05 0.200 REF 1 0.50 BSC 2.38 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1.
PAGE 12
LTC4301 U TYPICAL APPLICATIO 3.3V 5V 0.01µF 10k 10k VCC 10k LTC4301 STAGGERED CONNECTOR 10k BACK_SCL BACK_SDA SCLIN SCLOUT CARD_SCL SDAIN SDAOUT CARD_SDA 5V 10k FROM MICROPROCESSOR CS GND READY 4301 TA01 BACKPLANE CONNECTOR CARD Figure 8.