Datasheet

LTC4305
3
4305f
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full specified temperature
range, otherwise specifications are at T
A
= 25°C. V
CC
= 3.3V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supply/Start-Up
V
TH EN
ENABLE Falling Threshold Voltage 0.8 1.0 1.2 V
V
EN HYST
ENABLE Threshold Hysteresis Voltage 60 mV
t
PHL EN
ENABLE Delay, On-Off 60 ns
t
PLH EN
ENABLE Delay, Off-On 20 ns
I
IN
EN
ENABLE Input Leakage Current V
ENABLE
= 0V, 5.5V, V
CC
= 5.5V 0.1 ±
1 µA
V
LOW READY
READY Pin Logic Low Output Voltage I
PULL-UP
= 3mA, V
CC
= 2.7V 0.18 0.4 V
I
OFF READY
READY Off State Input Leakage Current V
READY
= 0V, 5.5V, V
CC
= 5.5V 0 ±
1 µA
ALERT
V
ALERT(OL)
ALERT Output Low Voltage I
ALERT
= 3mA, V
CC
= 2.7V 0.2 0.4 V
I
OFF,
ALERT
ALERT Off State Input Leakage Current V
ALERT
= 0V, 5.5V 0 ±
1 µA
I
IN,
ALERT1–2
ALERT1–ALERT2 Input Current V
ALERT1–2
= 0V, 5.5V 0 ±
1 µA
V
ALERT1–2(IN)
ALERT1–ALERT2 Pin Input Falling 0.8 1.0 1.2 V
Threshold Voltages
V
ALERT1–2(HY)
ALERT1–ALERT2 Pin Input Threshold 80 mV
Hysteresis Voltages
Rise Time Accelerators
V
SDA,SCL slew
Initial Slew Requirement to Activate SDAIN, SCLIN, SDA1–2, 0.4 0.8 V/µs
Rise Time Accelerator Currents SCL1–2 Pins
V
RISE,DC
Rise Time Accelerator DC Threshold Voltage SDAIN, SCLIN, SDA1–2, 0.7 0.8 1 V
SCL1–2 Pins
I
BOOST
Rise Time Accelerator Pull-Up Current SDAIN, SCLIN, SDA1–2, 4 5.5 mA
SCL1–2 Pins (Note 3)
Stuck Low Timeout Circuitry
V
TIMER(L)
Stuck Low Falling Threshold Voltage V
CC
= 2.7V, 5.5V 0.4 0.52 0.64 V
V
TIMER(HYST)
Stuck Low Threshold Hysteresis Voltage 80 mV
T
TIMER1
Timeout Time #1 TIMSET1,0 = 01 25 30 35 ms
T
TIMER2
Timeout Time #2 TIMSET1,0 = 10 12.5 15 17.5 ms
T
TIMER3
Timeout Time #3 TIMSET1,0 = 11 6.25 7.5 8.75 ms
Upstream-Downstream Buffers
V
OS,BUF
Buffer Offset Voltage R
BUS
= 10k, V
CC
= 2.7V, 5.5V (Note 4) 25 60 100 mV
V
OS,UP-BUF
Upstream Buffer Offset Voltage V
CC
= 2.7V, R
BUS
= 2.7k (Note 4) 40 80 120 mV
V
IN,BUFFER
= 0V V
CC
= 5.5V, R
BUS
= 2.7k (Note 4) 70 110 150 mV
V
OS,DOWN-BUF
Downstream Buffer Offset Voltage V
CC
= 2.7V, R
BUS
= 2.7k (Note 4) 60 110 160 mV
V
IN,BUFFER
= 0V V
CC
= 5.5V, R
BUS
= 2.7k (Note 4) 80 140 200 mV
V
OL
Output Low Voltage, V
IN,BUFFER
= 0V SDA, SCL Pins; I
SINK
= 4mA, 400 mV
V
CC
= 3V, 5.5V
V
OL
Output Low Voltage, V
IN,BUFFER
= 0.2V SDA, SCL Pins; I
SINK
= 500µA, 320 mV
V
CC
= 2.7V, 5.5V
V
IL,MAX
Buffer Input Logic Low Voltage V
CC
= 2.7V, 5.5V 0.4 0.52 0.64 V
V
THSDA,SCL
Downstream SDA, SCL Logic Threshold Voltage 0.8 1.0 1.2 V
I
LEAK
Input Leakage Current SDA, SCL Pins; ±5 µA
V
CC
= 0 to 5.5V;
Buffers Inactive