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LTC4306

4306f

The LTC

4306 is a 4-channel, 2-wire bus multiplexer with

bus buffers to provide capacitive isolation between the

upstream bus and downstream buses. Through software

control, the LTC4306 connects the upstream 2-wire bus to

any desired combination of downstream buses. Each

channel can be pulled up to a supply voltage ranging from

2.2V to 5.5V, independent of the LTC4306 supply voltage.

The downstream channels are also provided with

ALERT1-ALERT4 inputs for fault reporting.

Programmable timeout circuitry disconnects the down-

stream buses if the bus is stuck low. When activated, rise

time accelerators source currents into the 2-wire bus pins

to reduce rise time. Driving the ENABLE pin low restores

all features to their default states. Three address pins

provide 27 distinct addresses.

The LTC4306 is available in 24-lead QFN (4mm × 5mm)

and SSOP packages.

■

Nested Addressing

■

5V/3.3V Level Translator

■

Capacitance Buffer/Bus Extender

■

1:4 2-Wire Multiplexer/Switch

■

Connect SDA and SCL Lines with 2-Wire Bus

Commands

■

Supply Independent Bidirectional Buffer for SDA

and SCL Lines Increases Fan-Out

■

Programmable Disconnect from Stuck Bus

■

Compatible with I

C and SMBus Standards

■

Rise Time Accelerator Circuitry

■

SMBus Compatible ALERT Response Protocol

■

Two General Purpose Inputs-Outputs

■

Prevents SDA and SCL Corruption During Live Board

Insertion and Removal from Backplane

■

±10kV Human Body Model ESD Ruggedness

■

24-Lead QFN (4mm × 5mm) and SSOP Packages

4-Channel,

2-Wire Bus Multiplexer with

Capacitance Buffering

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

, LTC and LT are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners. Patent pending.

0.01µF

3.3V

•

2.5V

10k

LTC4306

ADDRESS = 1000 100

ADDRESS = 1111 000

SCL1

SDA1

ALERT1

SCLIN

SDAIN

ALERT

SCL4

SDA4

ALERT4

ADR2

ADR1

ADR0

GND

SFP

MODULE 1

MICRO-

CONTROLLER

10k 10k

10k

SFP

MODULE 4

10k 10k

4306 TA01a

A Level Shifting and Nested Addressing Application

4306 TA01b

= 3.3V

VCARD1 = 3.3V

VCARD4 = 5V

VBACK = 2.5V

SCL4

2V/DIV

500ns/DIV

SCL1

2V/DIV

SCLIN

2V/DIV

C Bus Waveforms

Summary of content (20 pages)

PAGE 1
LTC4306 4-Channel, 2-Wire Bus Multiplexer with Capacitance Buffering U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO 1:4 2-Wire Multiplexer/Switch Connect SDA and SCL Lines with 2-Wire Bus Commands Supply Independent Bidirectional Buffer for SDA and SCL Lines Increases Fan-Out Programmable Disconnect from Stuck Bus Compatible with I2C and SMBus Standards Rise Time Accelerator Circuitry SMBus Compatible ALERT Response Protocol Two General Purpose Inputs-Outputs Prevents SDA and SCL Corruption During Live Boa
PAGE 2
LTC4306 W W W AXI U U ABSOLUTE RATI GS (Note 1) Supply Voltage (VCC) ................................... –0.3V to 7V Input Voltages (ADR0, ADR1, ADR2, ENABLE, ALERT1, ALERT2, ALERT3, ALERT4) .................................................. –0.3V to 7V Output Voltages (ALERT, READY) ............... –0.3V to 7V Input/Output Voltages (SDAIN, SCLIN, SCL1, SDA1, SCL2, SDA2, SCL3, SDA3, SCL4, SDA4, GPIO1, GPIO2) ........ –0.
PAGE 3
LTC4306 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V unless otherwise noted. SYMBOL PARAMETER MIN TYP MAX UNITS VUVLOHYST UVLO Threshold Hysteresis Voltage CONDITIONS ● 100 175 250 mV VTH EN ENABLE Falling Threshold Voltage ● 0.8 1.0 1.
PAGE 4
LTC4306 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V unless otherwise noted. SYMBOL PARAMETER VALERT1-4(IN) ALERT1-ALERT4 Pin Input Falling Threshold Voltages VALERT1-4(HY) ALERT1-ALERT4 Pin Input Threshold Hysteresis Voltages CONDITIONS ● MIN TYP MAX UNITS 0.8 1.0 1.
PAGE 5
LTC4306 U W TYPICAL PERFOR A CE CHARACTERISTICS Buffer Circuitry tPHL vs Temperature Rise Time vs CBUS vs VCC 120 250 100 dV = 0.3V • VCC TO 0.7V • VCC RBUS = 10k VCC = 5V 5 VCC = 5V 60 40 VCC = 3.3V CURRENT (mA) RISE TIME (ns) 80 VCC = 5V 150 100 50 20 50 25 75 0 TEMPERATURE (°C) 100 0 125 VCC = 3.
PAGE 6
LTC4306 U U U PI FU CTIO S (GN24 Package/UFD24 Package) ALERT (Pin 3/Pin 1): Fault Alert Output. An open-drain output that is pulled low when a fault occurs to alert the host controller. The LTC4306 pulls ALERT low when any of the ALERT1-ALERT4 pins is low, when the 2-wire bus is stuck low, or when the Connection Requirement bit of Register 2 is low and a master tries to connect to a downstream channel that is low. See Operation section for the details of how ALERT is set and cleared.
PAGE 7
GPIO1 GPIO2 ENABLE INACC SDAIN 1.1V/1V + – + – 1.6V/1.52V SCLIN SLEW RATE DETECTOR 2.5V/2.
PAGE 8
LTC4306 U OPERATIO Control Register Bit Definitions Register 1 (01h) Register 0 (00h) BIT NAME TYPE* DESCRIPTION BIT NAME TYPE* DESCRIPTION d7 Downstream Connected R Indicates if upstream bus is connected to any downstream buses 0 = upstream bus disconnected from all downstream buses 1 = upstream bus connected to one or more downstream buses d7 Upstream Accelerators Enable R/W Activates upstream rise time accelerator currents 0 = upstream rise time accelerator currents inactive (default) 1 = up
PAGE 9
LTC4306 U OPERATIO Register 3 (03h) Register 2 (02h) BIT NAME TYPE* DESCRIPTION d7 GPIO1 Mode Configure R/W Configures Input/Output mode of GPIO1 0 = output mode (default) 1 = input mode d6 GPIO2 Mode Configure R/W Configures Input/Output Mode of GPIO2 0 = output mode (default) 1 = input mode d5 Connection Requirement R/W Sets logic requirements for downstream buses to be connected to upstream bus 0 = Bus Logic State bits (see register 3) of buses to be connected must be high for connection to occu
PAGE 10
LTC4306 U OPERATIO The LTC4306 is a 4-channel, 2-wire bus multiplexer/ switch with bus buffers to provide capacitive isolation between the upstream bus and downstream buses. Masters on the upstream 2-wire bus (SDAIN and SCLIN) can command the LTC4306 to any combination of the 4 downstream buses. Masters can also program the LTC4306 to disconnect the upstream bus from the downstream buses if the bus is stuck low.
PAGE 11
LTC4306 U OPERATIO VCC = VBUS1 = 5V R1 10k SDA1 N1 VBUS2 = 2.5V R2 10k SDA2 N2 channel. Note that users can write a high to the Connection Requirement bit of register 2 high to program the LTC4306 to connect to downstream channels regardless of their logic state at the moment of connection. In this case, the downstream channel connection fault never occurs. Stuck Low Timeout Fault 4306 F01 Figure 1.
PAGE 12
LTC4306 U OPERATIO In all other cases, the LTC4306 communicates with the master to resolve the fault. After the master broadcasts the Alert Response Address (ARA), the LTC4306 will respond with its address on the SDAIN line and release the ALERT pin. The ALERT line will also be released if the LTC4306 is addressed by the master. connect to bus 2, so that it can communicate with the source of the fault. At this point, the master writes to register 0 to clear the LTC4306 fault register.
PAGE 13
LTC4306 U OPERATIO Table 1.
PAGE 14
LTC4306 U OPERATIO SDA a6-a0 SCL 1-7 d7-d0 8 d7-d0 1-7 9 8 9 1-7 8 9 P S START CONDITION ADDRESS R/W ACK DATA ACK DATA ACK STOP CONDITION 4306 F03 Figure 3.
PAGE 15
LTC4306 U OPERATIO Fall Time Control where tf is the fall time in ns and CB is the equivalent bus capacitance in pF. Whenever the Upstream-Downstream Buffer Circuitry is active, its output signal will meet the fall time requirements, provided that its input signal meets the fall time requirements. Per the I2C Fast Mode (400kHz) Specification, the twowire bus digital interface circuitry provides fall time control when forcing logic lows onto the SDAIN bus. The fall time always meets the limits: (20 + 0.
PAGE 16
LTC4306 U W U U APPLICATIO S I FOR ATIO Assume in Figure 5 that the total parasitic bus capacitance on SDA1 due to trace and device capacitance is 100pF. To ensure that the boost currents are active during rising edges, the pull-up resistor must be strong enough to cause the SDA1 pin voltage to rise at a rate of 0.8V/µs as the pin voltage is rising above 0.8V. The equation is: ⎧ ⎡ ns ⎤ ⎫ ⎨( VBUSMIN – 0 .
PAGE 17
LTC4306 U W U U APPLICATIO S I FOR ATIO VCC R2 10k R3 10k R4 10k C1 0.
PAGE 18
LTC4306 U W U U APPLICATIO S I FOR ATIO VCC R4 10k C1 0.
PAGE 19
LTC4306 U PACKAGE DESCRIPTIO UFD Package 24-Lead Plastic QFN (4mm x 5mm) (Reference LTC DWG # 05-08-1696) 2.65 ± 0.10 (2 SIDES) R = 0.115 TYP 23 24 0.75 ± 0.05 4.00 ± 0.10 (2 SIDES) PIN 1 NOTCH R = 0.30 TYP 0.40 ± 0.05 PIN 1 TOP MARK (NOTE 6) 0.70 ±0.05 1 4.50 ± 0.05 3.10 ± 0.05 2 2.65 ± 0.05 (2 SIDES) 5.00 ± 0.10 (2 SIDES) 3.65 ± 0.10 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.65 ± 0.05 (2 SIDES) 4.10 ± 0.05 5.50 ± 0.05 (UFD24) QFN 0505 0.25 ± 0.05 0.200 REF 0.50 BSC 0.00 – 0.
PAGE 20
LTC4306 U W U U APPLICATIO S I FOR ATIO VCC = 3.3V R2 10k R3 10k R4 10k C1 0.01µF R5 10k VCC R7 10k R8 10k SCL1 SCLIN MICROCONTROLLER R6 10k TEMPERATURE SENSOR SDA1 ALERT1 SDAIN VCC2 = 5V ENABLE R9 10k R10 10k R11 10k SCL2 ALERT VOLTAGE MONITOR SDA2 READY VCC ALERT2 LTC4306UFD VCC3 = 2.5V GPI01 R1 1k LED R12 10k GPI02 R13 10k R14 10k SCL3 TEMPERATURE SENSOR SDA3 ALERT3 ADR2 OPEN VCC4 = 3.